Merge remote-tracking branch 'refs/remotes/lab/logging'

RIOT-OS · Aug 29, 2024 · e5402fd · e5402fd
2 parents 8beb57c + b056060
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diff --git a/boards/common/particle-mesh/include/board.h b/boards/common/particle-mesh/include/board.h
@@ -95,6 +95,18 @@ extern "C" {
 #define LED2_MASK           (1 << 15)
 #define LED_MASK            (LED0_MASK | LED1_MASK | LED2_MASK)
 
+/* The typical SAUL setup for this board uses PWM to make the LEDs (really a
+ * single RGB LED) into a PWM controlled RGB LED entry. As a consequence of the
+ * PWM configuration, toggling the GPIO has no effect any more, and thus we do
+ * not define the macros so that no LEDs get picked up for LEDn_IS_PROVIDED.
+ * (The LEDn_ON etc macros will still be present and no-op as usual, but those
+ * explicitly checking for IS_PROVIDED will get an accurate picture).
+ *
+ * Both conditions are typically true when saul_default is on, but strictly, it
+ * is those two that in combination make LEDs effectively unavailable to users.
+ * */
+#if !(IS_USED(MODULE_AUTO_INIT_SAUL) && IS_USED(MODULE_SAUL_PWM))
+
 #define LED0_ON             (LED_PORT->OUTCLR = LED0_MASK)
 #define LED0_OFF            (LED_PORT->OUTSET = LED0_MASK)
 #define LED0_TOGGLE         (LED_PORT->OUT   ^= LED0_MASK)
@@ -106,6 +118,9 @@ extern "C" {
 #define LED2_ON             (LED_PORT->OUTCLR = LED2_MASK)
 #define LED2_OFF            (LED_PORT->OUTSET = LED2_MASK)
 #define LED2_TOGGLE         (LED_PORT->OUT   ^= LED2_MASK)
+
+#endif /* !(IS_USED(MODULE_AUTO_INIT_SAUL) && IS_USED(MODULE_SAUL_PWM)) */
+
 /** @} */
 
 /**

diff --git a/boards/ek-lm4f120xl/include/board.h b/boards/ek-lm4f120xl/include/board.h
@@ -46,22 +46,26 @@ extern "C" {
 #define LED1_PIN            GPIO_PIN(5, 2)
 #define LED2_PIN            GPIO_PIN(5, 3)
 
-#define LED_PORT            (GPIO_PORTF_DATA_R)
+/**
+ * @brief Port used for `LED0_ON` and similar implementations
+ * @internal
+ * */
+#define LED_PORT()          (GPIO_PORTF_DATA_R)
 #define LED0_MASK           (1 << 7)
 #define LED1_MASK           (1 << 2)
 #define LED2_MASK           (1 << 1)
 
-#define LED0_ON             (LED_PORT |=  LED0_MASK)
-#define LED0_OFF            (LED_PORT &= ~LED0_MASK)
-#define LED0_TOGGLE         (LED_PORT ^=  LED0_MASK)
+#define LED0_ON             (LED_PORT() |=  LED0_MASK)
+#define LED0_OFF            (LED_PORT() &= ~LED0_MASK)
+#define LED0_TOGGLE         (LED_PORT() ^=  LED0_MASK)
 
-#define LED1_ON             (LED_PORT |=  LED1_MASK)
-#define LED1_OFF            (LED_PORT &= ~LED1_MASK)
-#define LED1_TOGGLE         (LED_PORT ^=  LED1_MASK)
+#define LED1_ON             (LED_PORT() |=  LED1_MASK)
+#define LED1_OFF            (LED_PORT() &= ~LED1_MASK)
+#define LED1_TOGGLE         (LED_PORT() ^=  LED1_MASK)
 
-#define LED2_ON             (LED_PORT |=  LED2_MASK)
-#define LED2_OFF            (LED_PORT &= ~LED2_MASK)
-#define LED2_TOGGLE         (LED_PORT ^=  LED2_MASK)
+#define LED2_ON             (LED_PORT() |=  LED2_MASK)
+#define LED2_OFF            (LED_PORT() &= ~LED2_MASK)
+#define LED2_TOGGLE         (LED_PORT() ^=  LED2_MASK)
 /** @} */
 
 /**

diff --git a/boards/nucleo-f439zi/Makefile.features b/boards/nucleo-f439zi/Makefile.features
@@ -2,6 +2,7 @@ CPU = stm32
 CPU_MODEL = stm32f439zi
 
 # Put defined MCU peripherals here (in alphabetical order)
+FEATURES_PROVIDED += periph_adc
 FEATURES_PROVIDED += periph_dma
 FEATURES_PROVIDED += periph_eth
 FEATURES_PROVIDED += periph_i2c

diff --git a/boards/nucleo-f439zi/include/periph_conf.h b/boards/nucleo-f439zi/include/periph_conf.h
@@ -198,6 +198,44 @@ static const eth_conf_t eth_config = {
 #define ETH_DMA_ISR        isr_dma2_stream0
 /** @} */
 
+/**
+ * @name   ADC configuration
+ *
+ * Note that we do not configure all ADC channels,
+ * and not in the STM32F439ZI order. Instead, we
+ * just define 6 ADC channels, for the Nucleo
+ * Arduino header pins A0-A5 and the internal VBAT channel.
+ *
+ * To find appropriate device and channel find in the
+ * board manual, table showing pin assignments and
+ * information about ADC - a text similar to ADC[X]_IN[Y],
+ * where:
+ * [X] - describes used device - indexed from 0,
+ * for example ADC12_IN10 is device 0 or device 1,
+ * [Y] - describes used channel - indexed from 1,
+ * for example ADC12_IN10 is channel 10
+ *
+ * For STM32F439ZI this information is in MCU datasheet,
+ * Table 10, page 53 or in Nucleo-f439ZI board manual,
+ * Table 17, page 52.
+
+ * @{
+ */
+static const adc_conf_t adc_config[] = {
+    {GPIO_PIN(PORT_A, 3),  .dev = 2, .chan = 3},  /* ADC123_IN3 */
+    {GPIO_PIN(PORT_C, 0),  .dev = 2, .chan = 10}, /* ADC123_IN10 */
+    {GPIO_PIN(PORT_C, 3),  .dev = 2, .chan = 13}, /* ADC123_IN13 */
+    {GPIO_PIN(PORT_F, 3),  .dev = 2, .chan = 9},  /* ADC3_IN9    */
+    {GPIO_PIN(PORT_F, 5),  .dev = 2, .chan = 15}, /* ADC3_IN15   */
+    {GPIO_PIN(PORT_F, 10), .dev = 2, .chan = 8},  /* ADC3_IN8    */
+    {GPIO_UNDEF,           .dev = 0, .chan = 18}, /* VBAT */
+};
+
+#define VBAT_ADC            ADC_LINE(6) /**< VBAT ADC line */
+
+#define ADC_NUMOF           ARRAY_SIZE(adc_config)
+/** @} */
+
 #ifdef __cplusplus
 }
 #endif

diff --git a/boards/nucleo-g070rb/doc.txt b/boards/nucleo-g070rb/doc.txt
@@ -8,6 +8,30 @@
 The Nucleo-G070RB is a board from ST's Nucleo family supporting a ARM
 Cortex-M0+ STM32G070RB microcontroller with 36KiB of RAM and 128KiB of Flash.
 
+## Pinout
+
+@image html pinouts/nucleo-g070rb-and-g071rb.svg "Pinout for the nucleo-g070rg (from STM board manual)" width=50%
+
+### MCU
+
+| MCU          | STM32G070RB
+|:-------------|:--------------------|
+| Family       | ARM Cortex-M0+      |
+| Vendor       | ST Microelectronics |
+| RAM          | 36KiB               |
+| Flash        | 128KiB              |
+| Frequency    | up to 64 MHz        |
+| Timers       | 11 (2x watchdog, 1 SysTick, 8x 16-bit) |
+| ADCs         | 1x 12 bit (up to 16 channels) |
+| UARTs        | 4 USARTs            |
+| I2Cs         | 2                   |
+| SPIs         | 2                   |
+| RTC          | 1                   |
+| Datasheet    | [Datasheet](https://www.st.com/resource/en/datasheet/stm32g070rb.pdf)|
+| Reference Manual | [Reference Manual](https://www.st.com/resource/en/reference_manual/rm0454-stm32g0x0-advanced-armbased-32bit-mcus-stmicroelectronics.pdf)|
+| Programming Manual | [Programming Manual](https://www.st.com/resource/en/programming_manual/pm0223-stm32-cortexm0-mcus-programming-manual-stmicroelectronics.pdf)|
+| Board Manual | [Board Manual](https://www.st.com/resource/en/user_manual/um2324-stm32-nucleo64-boards-mb1360-stmicroelectronics.pdf)|
+
 ## Flashing the Board Using ST-LINK Removable Media
 
 On-board ST-LINK programmer provides via composite USB device removable media.

diff --git a/boards/nucleo-g071rb/doc.txt b/boards/nucleo-g071rb/doc.txt
@@ -8,6 +8,30 @@
 The Nucleo-G071RB is a board from ST's Nucleo family supporting a ARM
 Cortex-M0+ STM32G071RB microcontroller with 36KiB of RAM and 128KiB of Flash.
 
+## Pinout
+
+@image html pinouts/nucleo-g070rb-and-g071rb.svg "Pinout for the nucleo-g071rg (from STM board manual)" width=50%
+
+### MCU
+
+| MCU          | STM32G071RB
+|:-------------|:--------------------|
+| Family       | ARM Cortex-M0+      |
+| Vendor       | ST Microelectronics |
+| RAM          | 36KiB               |
+| Flash        | 128KiB              |
+| Frequency    | up to 64 MHz        |
+| Timers       | 14 (2x watchdog, 1 SysTick, 10x 16-bit and 1 32-bit) |
+| ADCs         | 1x 12 bit (up to 16 channels) |
+| UARTs        | 5 (four USARTs and one Low-Power UART) |
+| I2Cs         | 2                   |
+| SPIs         | 2                   |
+| RTC          | 1                   |
+| Datasheet    | [Datasheet](https://www.st.com/resource/en/datasheet/stm32g071rb.pdf)|
+| Reference Manual | [Reference Manual](https://www.st.com/resource/en/reference_manual/rm0454-stm32g0x0-advanced-armbased-32bit-mcus-stmicroelectronics.pdf)|
+| Programming Manual | [Programming Manual](https://www.st.com/resource/en/programming_manual/pm0223-stm32-cortexm0-mcus-programming-manual-stmicroelectronics.pdf)|
+| Board Manual | [Board Manual](https://www.st.com/resource/en/user_manual/um2324-stm32-nucleo64-boards-mb1360-stmicroelectronics.pdf)|
+
 ## Flashing the Board Using ST-LINK Removable Media
 
 On-board ST-LINK programmer provides via composite USB device removable media.

diff --git a/boards/nucleo-g431rb/doc.txt b/boards/nucleo-g431rb/doc.txt
@@ -8,6 +8,10 @@
 The Nucleo-G431RB is a board from ST's Nucleo family supporting a ARM
 Cortex-M4 STM32G431RB microcontroller with 32KiB of RAM and 128KiB of Flash.
 
+## Pinout
+
+@image html pinouts/nucleo-g431rb-and-more.svg "Pinout for the nucleo-g431rg (from STM board manual)" width=50%
+
 ## Flashing the device
 
 ### Flashing the Board Using OpenOCD

diff --git a/boards/nucleo-g474re/doc.txt b/boards/nucleo-g474re/doc.txt
@@ -8,6 +8,10 @@
 The Nucleo-G474RE is a board from ST's Nucleo family supporting a ARM
 Cortex-M4 STM32G474RE microcontroller with 128KiB of RAM and 512KiB of Flash.
 
+## Pinout
+
+@image html pinouts/nucleo-g431rb-and-more.svg "Pinout for the nucleo-g4741re (from STM board manual)" width=50%
+
 ## Flashing the device
 
 ### Flashing the Board Using OpenOCD

diff --git a/cpu/native/Makefile.include b/cpu/native/Makefile.include
@@ -7,6 +7,11 @@ ifneq (,$(filter periph_can,$(USEMODULE)))
   endif
 endif
 
+ifneq (,$(filter periph_timer,$(USEMODULE)))
+  # using timer_settime requires -lrt
+  LINKFLAGS += -lrt
+endif
+
 TOOLCHAINS_SUPPORTED = gnu llvm afl
 
 # Platform triple as used by Rust

diff --git a/cpu/native/periph/timer.c b/cpu/native/periph/timer.c
@@ -16,6 +16,8 @@
  * @brief       Native CPU periph/timer.h implementation
  *
  * Uses POSIX realtime clock and POSIX itimer to mimic hardware.
+ * This is done with the timer_settime(3), timer_create(3)  interfaces, which are
+ * sometimes found only in the -lrt library, and not in glibc.
  *
  * This is based on native's hwtimer implementation by Ludwig Knüpfer.
  * I removed the multiplexing, as ztimer does the same. (kaspar)

diff --git a/cpu/riscv_common/irq_arch.c b/cpu/riscv_common/irq_arch.c
@@ -146,8 +146,8 @@ static void handle_trap(uword_t mcause)
 #ifdef DEVELHELP
             printf("Unhandled trap:\n");
             printf("  mcause: 0x%" PRIx32 "\n", trap);
-            printf("  mepc:   0x%" PRIx32 "\n", read_csr(mepc));
-            printf("  mtval:  0x%" PRIx32 "\n", read_csr(mtval));
+            printf("  mepc:   0x%lx\n", read_csr(mepc));
+            printf("  mtval:  0x%lx\n", read_csr(mtval));
 #endif
             /* Unknown trap */
             core_panic(PANIC_GENERAL_ERROR, "Unhandled trap");

diff --git a/cpu/stm32/include/periph/f4/periph_cpu.h b/cpu/stm32/include/periph/f4/periph_cpu.h
@@ -32,8 +32,8 @@ extern "C" {
 #define ADC_DEVS            (1U)
 #elif defined(CPU_LINE_STM32F405xx)  || defined(CPU_LINE_STM32F407xx) \
     || defined(CPU_LINE_STM32F415xx) || defined(CPU_LINE_STM32F429xx) \
-    || defined(CPU_LINE_STM32F437xx) || defined(CPU_LINE_STM32F446xx) \
-    || defined(CPU_LINE_STM32F469xx)
+    || defined(CPU_LINE_STM32F439xx) || defined(CPU_LINE_STM32F437xx) \
+    || defined(CPU_LINE_STM32F446xx) || defined(CPU_LINE_STM32F469xx)
 #define ADC_DEVS            (3U)
 #endif