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cpu/fe310: use WFI to wait for SW interrupt
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kenrabold committed Sep 16, 2019
1 parent 0ae86d7 commit 547ebd1
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Showing 2 changed files with 17 additions and 7 deletions.
22 changes: 16 additions & 6 deletions cpu/fe310/cpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -187,11 +187,22 @@ void handle_trap(unsigned int mcause)
break;
}
}
else {
/* Unknown trap */
core_panic(PANIC_GENERAL_ERROR, "Unhandled trap");
}

/* ISR done - no more changes to thread states */
__in_isr = 0;
}

void panic_arch(void)
{
#ifdef DEVELHELP
while (1) {}
#endif
}

/**
* @brief Noticeable marker marking the beginning of a stack segment
*
Expand Down Expand Up @@ -319,22 +330,18 @@ void *thread_isr_stack_start(void)
}

/**
* @brief Start or resume threading by loading a threads initial information
* from the stack.
* @brief Call context switching at thread exit
*
* This is called is two situations: 1) after the initial main and idle threads
* have been created and 2) when a thread exits.
*
* sched_active_thread is not valid when cpu_switch_context_exit() is
* called. sched_run() must be called to determine the next valid thread.
* This is exploited in the context switch code.
*/
void cpu_switch_context_exit(void)
{
/* enable interrupts */
irq_enable();

/* start the thread by triggering a context switch */
/* force a context switch to another thread */
thread_yield_higher();
UNREACHABLE();
}
Expand All @@ -343,4 +350,7 @@ void thread_yield_higher(void)
{
/* Use SW intr to schedule context switch */
CLINT_REG(CLINT_MSIP) = 1;

/* Latency of SW intr can be 4-7 cycles; wait for the SW intr */
__asm__ volatile ("wfi");
}
2 changes: 1 addition & 1 deletion cpu/fe310/periph/pm.c
Original file line number Diff line number Diff line change
Expand Up @@ -23,7 +23,7 @@

void pm_set_lowest(void)
{
/* __asm__("wfi"); */
__asm__ volatile ("wfi");
}

void pm_off(void)
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