Consider the circuit X(0)-Z(1):
%0 = quantum.alloc( 2) : !quantum.reg
%1 = quantum.extract %0[ 0] : !quantum.reg -> !quantum.bit
%out_qubits = quantum.custom "PauliX"() %1 : !quantum.bit
%2 = quantum.insert %0[ 0], %out_qubits : !quantum.reg, !quantum.bit
%3 = quantum.extract %2[ 1] : !quantum.reg -> !quantum.bit
%out_qubits_0 = quantum.custom "PauliZ"() %3 : !quantum.bit
%4 = quantum.insert %2[ 1], %out_qubits_0 : !quantum.reg, !quantum.bit
quantum.dealloc %4 : !quantum.reg
After --canonicalize, the IR stays unchanged.
Proposed improvement:
Since the 0th and 1st qubits are from the same register, it should be possible to make them extract from the same SSA qreg value:
%0 = quantum.alloc( 2) : !quantum.reg
%1 = quantum.extract %0[ 0] : !quantum.reg -> !quantum.bit
%out_qubits = quantum.custom "PauliX"() %1 : !quantum.bit
%3 = quantum.extract %0[ 1] : !quantum.reg -> !quantum.bit
%out_qubits_0 = quantum.custom "PauliZ"() %3 : !quantum.bit
%2 = quantum.insert %0[ 0], %out_qubits : !quantum.reg, !quantum.bit
%4 = quantum.insert %2[ 1], %out_qubits_0 : !quantum.reg, !quantum.bit
quantum.dealloc %4 : !quantum.reg
This makes it easier to see if two qubits are from the same register.
Also, in the original version's dataflow, the 1st qubit is in the forward slice of the 0th qubit (through the in-between insert %2), but this is not the most optimal description of the circuit: the two starting qubit values on the two wires should ideally be independent dataflow-wise.
Consider the circuit
X(0)-Z(1):After
--canonicalize, the IR stays unchanged.Proposed improvement:
Since the 0th and 1st qubits are from the same register, it should be possible to make them extract from the same SSA qreg value:
This makes it easier to see if two qubits are from the same register.
Also, in the original version's dataflow, the 1st qubit is in the forward slice of the 0th qubit (through the in-between insert
%2), but this is not the most optimal description of the circuit: the two starting qubit values on the two wires should ideally be independent dataflow-wise.