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[PIR][oneDNN] Fix data type in cpu_bfloat16_squash_pass #67836

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Merged
merged 3 commits into from
Sep 4, 2024
Merged

[PIR][oneDNN] Fix data type in cpu_bfloat16_squash_pass #67836

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aa8a5c0
fix dtype
LLee233 Aug 29, 2024
846a7e5
add condition
LLee233 Aug 29, 2024
10965fa
delete useless code
LLee233 Sep 1, 2024
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20 changes: 9 additions & 11 deletions paddle/fluid/pir/transforms/onednn/cpu_bfloat16_squash_pass.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -27,12 +27,10 @@ namespace {

template <class IrType1, class IrType2>
static pir::Type create_type(pir::Type type,
const phi::Place &place,
pir::Type out_dtype,
pir::IrContext *ctx) {
auto input_type = type.dyn_cast<IrType1>();
return IrType2::get(ctx,
place,
out_dtype,
input_type.dims(),
input_type.data_layout(),
Expand Down Expand Up @@ -218,18 +216,18 @@ class QuantConvBf16SquashPattern
op_attributes["scale_weights"] =
rewriter.array_attr({rewriter.float_attr(1.0f)});

pir::IrContext *ctx = pir::IrContext::Instance();
pir::IrContext *ctx = rewriter.ir_context();
auto op_info = ctx->GetRegisteredOpInfo(
paddle::onednn::dialect::FusedConv2dOp::name());
if (!op_info) return false;

std::vector<pir::Type> op_item_inner_output_types;
for (size_t i = 0; i < next_op->num_results(); ++i) {
pir::Type type = next_op->result_type(i);
if (!type.isa<pir::DenseTensorType>()) return false;
pir::Type new_type =
create_type<pir::DenseTensorType,
paddle::dialect::AllocatedDenseTensorType>(
type, phi::CPUPlace(), pir::BFloat16Type::get(ctx), ctx);
create_type<pir::DenseTensorType, paddle::dialect::DenseTensorType>(
type, pir::BFloat16Type::get(ctx), ctx);
// set bf16 op tensor output type to bf16.
op_item_inner_output_types.push_back(new_type);
}
Expand Down Expand Up @@ -278,18 +276,18 @@ class QuantFusedConvBf16SquashPattern
if (q_scale != 1.0f || q_shift != 0.0f) return false;
if (next_op.input() != op.output()) return false;

auto op_info = pir::IrContext::Instance()->GetRegisteredOpInfo(
pir::IrContext *ctx = rewriter.ir_context();
auto op_info = ctx->GetRegisteredOpInfo(
paddle::onednn::dialect::FusedConv2dOp::name());
if (!op_info) return false;

pir::IrContext *ctx = pir::IrContext::Instance();
std::vector<pir::Type> op_item_inner_output_types;
for (size_t i = 0; i < next_op->num_results(); ++i) {
pir::Type type = next_op->result_type(i);
if (!type.isa<pir::DenseTensorType>()) return false;
pir::Type new_type =
create_type<pir::DenseTensorType,
paddle::dialect::AllocatedDenseTensorType>(
type, phi::CPUPlace(), pir::BFloat16Type::get(ctx), ctx);
create_type<pir::DenseTensorType, paddle::dialect::DenseTensorType>(
type, pir::BFloat16Type::get(ctx), ctx);
// set bf16 op tensor output type to bf16.
op_item_inner_output_types.push_back(new_type);
}
Expand Down
9 changes: 0 additions & 9 deletions test/ir/pir/fused_pass/onednn/test_cpu_bfloat16_squash_pass.py
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Original file line number Diff line number Diff line change
Expand Up @@ -34,13 +34,6 @@ def build_ir_program(self):
x = paddle.static.data(
name='x', shape=[5, 5, 5, 5], dtype='float32'
)
bias_attr = paddle.ParamAttr(
learning_rate=0.0,
initializer=paddle.nn.initializer.Normal(mean=0.0, std=2.0),
)
bias = paddle.static.create_parameter(
shape=[1], dtype='float32', attr=bias_attr, is_bias=False
)
w_attr = paddle.ParamAttr(
learning_rate=0.0,
initializer=paddle.nn.initializer.Normal(mean=0.0, std=2.0),
Expand All @@ -58,7 +51,6 @@ def build_ir_program(self):
weight_attr=w_attr,
)

# out = paddle.add(conv2d(x), bias)
out = conv2d(x)
out = paddle.assign(out)
self.pass_attr_list = [
Expand Down Expand Up @@ -129,7 +121,6 @@ def build_ir_program(self):
weight_attr=w_attr,
)

# out = paddle.add(conv2d(x), bias)
out_conv = conv2d(x)
out = paddle.add(out_conv, bias)
out = paddle.assign(out)
Expand Down