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[OneDNN]Fix ocr error since pass avx512 command #64132

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merged 4 commits into from
May 13, 2024

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zhanglirong1999
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Bug fixes

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Fix ocr error since pass avx512 command

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paddle-bot bot commented May 9, 2024

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@paddle-bot paddle-bot bot added the contributor External developers label May 9, 2024
@zhanglirong1999
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zhanglirong1999 commented May 9, 2024

related issue: #11597


#ifdef PADDLE_WITH_DNNL
if (!phi::backends::cpu::MayIUse(
phi::backends::cpu::cpu_isa_t::avx512_core)) {
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For here, the limitation is a bit strict, since in self_dp_attention_kernel, the commonly used ISA was AVX512F. While this condition will block application of machines with only AVX512F.

@jzhang533
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thanks for fixing, skip avx512 implemented pass on non-avx512 platforms will solve the illegal instruction issue.

I am kind of wondering the expected performance on non-avx512 platforms, since we have issues reporting unacceptable low speed on non-avx512 plaftorms, e.g.: PaddlePaddle/PaddleOCR#10346.

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LGTM

@yuanlehome yuanlehome merged commit 28d573c into PaddlePaddle:develop May 13, 2024
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@LLee233
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LLee233 commented May 13, 2024

thanks for fixing, skip avx512 implemented pass on non-avx512 platforms will solve the illegal instruction issue.

I am kind of wondering the expected performance on non-avx512 platforms, since we have issues reporting unacceptable low speed on non-avx512 plaftorms, e.g.: PaddlePaddle/PaddleOCR#10346.

Hi @jzhang533, as I mentioned in the issue, this is actually the same reason causing unexpected phenomenon. AMD seems has their mechanism to deal with incompatible higher ISA (and which also makes it hard to find the root cause since it wouldn’t report the error directly).

And about performance on non-avx512 platform. If we build and install Paddle on non-avx512 machine, the performance will be as expected, which means the performance will be better when enabling oneDNN/mkldnn.

co63oc pushed a commit to co63oc/Paddle that referenced this pull request May 13, 2024
* fix ocr avx error since pass avx512 command

* replace 512 core to 512f, limit restrict

* skip avx2 in new pir pass

* fix
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4 participants