LLVM AtomicRMW Instruction

[hudson-ayers]

Would it be possible to support the LLVm AtomicRMW Instruction? I am running into the following error:

UnsupportedInstruction: encountered an LLVM instruction which is not currently supported: instruction AtomicRMW.

Or does handling atomic instructions add significant complexity?

[cdisselkoen]

Oh for sure, we can support this now.

The original reason Haybale didn't support AtomicRMW was because the C API in LLVM 9 and earlier is missing a getter for the opcode of an AtomicRMW. (See the Limitations section of the llvm-ir README.) But now that we have LLVM 10 we can easily support it. It'll have to be supported only with llvm-10 feature, of course.

Under the hood, if you're curious, since Haybale doesn't model threading at all, we don't have to do anything about the "atomic" part of the instruction, we just have to implement the component operations of each opcode: read, modify, write.

[cdisselkoen]

Added AtomicRMW support (and tests)

[hudson-ayers]

Thank you! Excited to try it out.