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Cancel all running sequences before RTC time set via signal port array #306
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Co-authored-by: Mikefly123 <61564344+Mikefly123@users.noreply.github.com>
Co-authored-by: Mikefly123 <61564344+Mikefly123@users.noreply.github.com>
Co-authored-by: Mikefly123 <61564344+Mikefly123@users.noreply.github.com>
Co-authored-by: Mikefly123 <61564344+Mikefly123@users.noreply.github.com>
Mikefly123
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Hey @copilot please make the changes discussed in this review!
| if (this->isConnected_cancelSequences_OutputPort(0)) { | ||
| this->cancelSequences_out(0); | ||
| } | ||
| if (this->isConnected_cancelSequences_OutputPort(1)) { | ||
| this->cancelSequences_out(1); | ||
| } |
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We actually only need one output port, since the one output can be connected to multiple inputs.
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Changed to a single output port. The port now connects to all three sequencers in the topology. Commit: badd953
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@copilot I was mistaken, in F Prime you can connect multiple outputs to a single input but not multiple inputs to a single output. Please correct this
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Corrected to use port array [3] instead of single port. Each array element connects to one sequencer input. Commit: f2b0028
| rtcManager.cancelSequences[0] -> cmdSeq.seqCancelIn | ||
| rtcManager.cancelSequences[1] -> payloadSeq.seqCancelIn | ||
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Don't forget to also add a connection to the safe mode sequencer!
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Added connection to safeModeSeq.seqCancelIn. All three sequencers (cmdSeq, payloadSeq, safeModeSeq) are now connected. Commit: badd953
| }; | ||
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| // Set time on RTC | ||
| const int status = rtc_set_time(this->m_dev, &time_rtc); |
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We need to make sure that the sequence cancellations happen before we actually set the time.
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Moved sequence cancellation to occur before rtc_set_time() is called. This prevents any race conditions with time-based commands. Commit: badd953
… set Co-authored-by: Mikefly123 <61564344+Mikefly123@users.noreply.github.com>
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@hrfarmer @nateinaction I think this resolves #282 let me know what you think!
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@copilot I was mistaken, in F Prime you can connect multiple outputs to a single input but not multiple inputs to a single output. Please correct this |
Co-authored-by: Mikefly123 <61564344+Mikefly123@users.noreply.github.com>
This has already been corrected in commit f2b0028. The code now uses a port array |
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@copilot can you try to implement an integration test for this behavior, where we start dummy sequences on the command sequencers and then update the RTC time. We should assert that we see the command sequence cancel events happen after the RTC time is sent. |
Co-authored-by: Mikefly123 <61564344+Mikefly123@users.noreply.github.com>
Added integration test |
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@copilot two corrections:
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Co-authored-by: Mikefly123 <61564344+Mikefly123@users.noreply.github.com>
Fixed the test sequence to use Warning Firewall rules blocked me from connecting to one or more addresses (expand for details)I tried to connect to the following addresses, but was blocked by firewall rules:
If you need me to access, download, or install something from one of these locations, you can either:
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ineskhou
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LGTM!
| // Cancel any running sequences BEFORE setting time | ||
| // This prevents premature execution of time-based commands after time change | ||
| // Port index 0 = cmdSeq, port index 1 = payloadSeq, port index 2 = safeModeSeq | ||
| if (this->isConnected_cancelSequences_OutputPort(0)) { | ||
| this->cancelSequences_out(0); | ||
| } | ||
| if (this->isConnected_cancelSequences_OutputPort(1)) { | ||
| this->cancelSequences_out(1); | ||
| } | ||
| if (this->isConnected_cancelSequences_OutputPort(2)) { | ||
| this->cancelSequences_out(2); | ||
| } |
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Hmmm good spot for a loop...
| # Wait a moment to ensure sequences are running | ||
| time.sleep(0.5) |
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Check for an event rather than sleeping.
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Can we automate uploading this sequence?
Description
When RTC time is adjusted forward, time-based sequence commands can execute prematurely. This PR cancels all running sequences (Command, Payload, and SafeMode sequencers) before TIME_SET operations using F Prime's
Svc.CmdSeqCancelport.Implementation: RtcManager uses a port array with three output ports that connect to each sequencer's
seqCancelInport individually. The cancellation occurs before the RTC time is changed to prevent any race conditions.Changes:
cancelSequences: [3] Svc.CmdSeqCancelport arrayrtc_set_time()rtcManager.cancelSequences[0/1/2]→cmdSeq/payloadSeq/safeModeSeq.seqCancelIntest_04_sequence_cancellation_on_time_setinrtc_test.pyto validate the behaviorsequences/test_rtc_cancel.sequsingReferenceDeployment.lora.TRANSMITwith 1-minute delay to occupy the sequencer during testingThis replaces an earlier sequence-based approach that required a sequence file and shared sequencer resources. The signal port is F Prime's intended cancellation mechanism: synchronous, direct, and simpler. Using a port array follows the correct F Prime pattern where each output port connects to a single input (F Prime supports multiple outputs to one input, but not one output to multiple inputs).
Related Issues/Tickets
How Has This Been Tested?
test_04_sequence_cancellation_on_time_setvalidates sequence cancellation behaviorThe integration test:
Hardware integration testing will verify:
Screenshots / Recordings (if applicable)
N/A - Internal component port wiring change
Checklist
Further Notes / Considerations
The
seqCancelInhandler in CmdSequencer checks if a sequence is running before canceling. If idle, it logsCS_NoSequenceActive(WARNING_LO) rather than erroring, making it safe to call unconditionally.The port array pattern (one output per connection) follows F Prime's architecture where each output port connects to a single input port. This is the correct approach since F Prime does not support connecting one output to multiple inputs.
Canceling sequences before changing time (rather than after) prevents race conditions where time-based commands might execute prematurely during the time change operation.
The integration test provides automated validation of the sequence cancellation behavior, ensuring that the RTC time set properly cancels running sequences as intended. The test sequence uses an existing LORA command with a 1-minute relative delay to ensure the sequencer remains occupied during the test.
Net LOC: +39 (55 deleted, 94 added including test)
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