RFC: Device Tree support

.travis.yml

@@ -126,6 +126,7 @@ script:
   - $make CFG_RPMB_FS=y
   - $make CFG_RPMB_FS=y CFG_ENC_FS=n
   - $make CFG_RPMB_FS=y CFG_ENC_FS=n CFG_RPMB_TESTKEY=y
+  - $make CFG_DT=y
 
   # QEMU-ARMv8A
   - $make PLATFORM=vexpress-qemu_armv8a CFG_ARM64_core=y

core/arch/arm/include/kernel/generic_boot.h

@@ -31,10 +31,12 @@
 
 #if defined(CFG_WITH_ARM_TRUSTED_FW)
 uint32_t cpu_on_handler(uint32_t a0, uint32_t a1);
-uint32_t *generic_boot_init_primary(uint32_t pageable_part);
+uint32_t *generic_boot_init_primary(uint32_t pageable_part, uint32_t unused,
+				    uint32_t fdt);
 uint32_t generic_boot_cpu_on_handler(uint32_t a0, uint32_t a1);
 #else
-void generic_boot_init_primary(uint32_t pageable_part, uint32_t nsec_entry);
+void generic_boot_init_primary(uint32_t pageable_part, uint32_t nsec_entry,
+			       uint32_t fdt);
 void generic_boot_init_secondary(uint32_t nsec_entry);
 #endif
 

core/arch/arm/kernel/generic_boot.c

@@ -29,6 +29,7 @@
 #include <assert.h>
 #include <compiler.h>
 #include <inttypes.h>
+#include <kernel/dt.h>
 #include <kernel/generic_boot.h>
 #include <kernel/thread.h>
 #include <kernel/panic.h>
@@ -43,6 +44,7 @@
 #include <tee/tee_cryp_provider.h>
 #include <utee_defines.h>
 #include <util.h>
+#include <console.h>
 
 #include <platform_config.h>
 
@@ -313,7 +315,8 @@ static void init_runtime(uint32_t pageable_part __unused)
 }
 #endif
 
-static void init_primary_helper(uint32_t pageable_part, uint32_t nsec_entry)
+static void init_primary_helper(uint32_t pageable_part, uint32_t nsec_entry,
+				uint32_t fdt __unused)
 {
 	/*
 	 * Mask asynchronous exceptions before switch to the thread vector
@@ -326,6 +329,10 @@ static void init_primary_helper(uint32_t pageable_part, uint32_t nsec_entry)
 
 	init_runtime(pageable_part);
 
+	if (dt_validate((void *)(uintptr_t)fdt) < 0)
+		panic();
+	console_init();
+
 	IMSG("Initializing (%s)\n", core_v_str);
 
 	thread_init_primary(generic_boot_get_handlers());
@@ -360,9 +367,11 @@ static void init_secondary_helper(uint32_t nsec_entry)
 }
 
 #if defined(CFG_WITH_ARM_TRUSTED_FW)
-uint32_t *generic_boot_init_primary(uint32_t pageable_part)
+uint32_t *generic_boot_init_primary(uint32_t pageable_part,
+				    uint32_t u __unused,
+				    uint32_t fdt)
 {
-	init_primary_helper(pageable_part, PADDR_INVALID);
+	init_primary_helper(pageable_part, PADDR_INVALID, fdt);
 	return thread_vector_table;
 }
 
@@ -374,9 +383,10 @@ uint32_t generic_boot_cpu_on_handler(uint32_t a0 __maybe_unused,
 	return 0;
 }
 #else
-void generic_boot_init_primary(uint32_t pageable_part, uint32_t nsec_entry)
+void generic_boot_init_primary(uint32_t pageable_part, uint32_t nsec_entry,
+			       uint32_t fdt)
 {
-	init_primary_helper(pageable_part, nsec_entry);
+	init_primary_helper(pageable_part, nsec_entry, fdt);
 }
 
 void generic_boot_init_secondary(uint32_t nsec_entry)

core/arch/arm/kernel/generic_entry_a32.S

@@ -49,6 +49,9 @@ gdb_bootargs:
 	.word 0
 #endif
 
+fdt_addr:
+	.word 0
+
 .section .text.boot
 FUNC _start , :
 	b	reset
@@ -153,6 +156,8 @@ UNWIND(	.fnstart)
 UNWIND(	.cantunwind)
 	mov	r4, r0		/* Save pageable part address */
 	mov	r5, lr		/* Save ns-entry address */
+	ldr	r0, =fdt_addr	/* Save DT address */
+	stm	r0, {r2}
 
 #ifdef CFG_TEE_GDB_BOOT
 	/*
@@ -163,12 +168,12 @@ UNWIND(	.cantunwind)
 	mov	r6, r0
 	mov	r7, r1
 	mov	r8, r2
-#ifdef CFG_WITH_PAGER
+#if defined(CFG_WITH_PAGER) || defined (CFG_DT)
 	/*
-	 * r0 is used for different purposes when pager or GDB boot are enabled
-	 * so they are incompatible
+	 * r0/r2 are used for different purposes by GDB boot and pager/DT
+	 * so these configurations are incompatible
 	 */
-#error CFG_WITH_PAGER and CFG_TEE_GDB_BOOT cannot be enabled simultaneously
+#error CFG_TEE_GDB_BOOT and (CFG_WITH_PAGER || CFG_DT) are incompatible
 #endif
 #endif
 
@@ -243,8 +248,8 @@ copy_init:
 	/* complete ARM secure MP common configuration */
 	bl	plat_cpu_reset_late
 
-	/* Enable Console */
-	bl	console_init
+	/* Enable early console */
+	bl	earlycon_init
 
 #ifdef CFG_PL310
 	bl	arm_cl2_config
@@ -288,6 +293,8 @@ copy_init:
 
 	mov	r0, r4		/* pageable part address */
 	mov	r1, r5		/* ns-entry address */
+	ldr	r3, =fdt_addr	/* DT address */
+	ldm	r3, {r2}
 	bl	generic_boot_init_primary
 	mov	r4, r0		/* save entry test vector */
 

core/arch/arm/kernel/generic_entry_a64.S

@@ -36,6 +36,7 @@
 .section .text.boot
 FUNC _start , :
 	mov	x19, x0		/* Save pagable part address */
+	mov	x20, x2		/* Save DT address */
 
 	adr	x0, reset_vect_table
 	msr	vbar_el1, x0
@@ -102,8 +103,8 @@ copy_init:
 	sub	x1, x1, x0
 	bl	inv_dcache_range
 
-	/* Enable Console */
-	bl	console_init
+	/* Enable early console */
+	bl	earlycon_init
 
 	bl	core_init_mmu_map
 	bl	core_init_mmu_regs
@@ -113,6 +114,7 @@ copy_init:
 
 	mov	x0, x19		/* pagable part address */
 	mov	x1, #-1
+	mov	x2, x20		/* DT address */
 	bl	generic_boot_init_primary
 
 	/*

core/arch/arm/kernel/kern.ld.S

@@ -129,6 +129,11 @@ SECTIONS
 		*(.rodata .rodata.__unpaged)
 #include <rodata_unpaged.ld.S>
 #else
+#ifdef CFG_DT
+		__rodata_dtdrv_start = .;
+		KEEP(*(.rodata.dtdrv))
+		__rodata_dtdrv_end = .;
+#endif
 		*(.rodata .rodata.*)
 
 		/*
@@ -248,6 +253,11 @@ SECTIONS
 
 	.rodata_pageable : ALIGN(4) {
 		__rodata_pageable_start = .;
+#ifdef CFG_DT
+		__rodata_dtdrv_start = .;
+		KEEP(*(.rodata.dtdrv))
+		__rodata_dtrv_end = .;
+#endif
 		*(.rodata*)
 		. = ALIGN(4);
 		__start_ta_head_section = . ;

core/arch/arm/plat-hikey/main.c

@@ -60,21 +60,20 @@ static void main_fiq(void)
 	panic();
 }
 
-void console_init(void)
+void earlycon_init(void)
 {
-	pl011_init(CONSOLE_UART_BASE,
-		   CONSOLE_UART_CLK_IN_HZ,
+	pl011_init(CONSOLE_UART_BASE, CONSOLE_UART_CLK_IN_HZ,
 		   CONSOLE_BAUDRATE);
 }
 
-void console_putc(int ch)
+void earlycon_putc(int ch)
 {
 	pl011_putc(ch, CONSOLE_UART_BASE);
 	if (ch == '\n')
 		pl011_putc('\r', CONSOLE_UART_BASE);
 }
 
-void console_flush(void)
+void earlycon_flush(void)
 {
 	pl011_flush(CONSOLE_UART_BASE);
 }

core/arch/arm/plat-hikey/platform_config.h

@@ -129,9 +129,39 @@
 
 #endif /* CFG_WITH_PAGER */
 
+#ifdef CFG_DT
+/*
+ * Statically reserve ranges for all UARTs (except BT) in case they are needed
+ * for the console (DT /chosen/[secure-]stdout-path).
+ *
+ * FIXME: this should be done dynamically when the MMU code supports it.
+ */
+/* UART0: onboard */
+#define DEVICE0_BASE		ROUNDDOWN(0xf8015000, CORE_MMU_DEVICE_SIZE)
+#define DEVICE0_SIZE		CORE_MMU_DEVICE_SIZE
+#define DEVICE0_TYPE		MEM_AREA_IO_NSEC
+
+/* UART1 is Bluetooth */
+
+/* UART2: LS expansion UART0 */
+#define DEVICE1_BASE		ROUNDDOWN(0xf7112000, CORE_MMU_DEVICE_SIZE)
+#define DEVICE1_SIZE		CORE_MMU_DEVICE_SIZE
+#define DEVICE1_TYPE		MEM_AREA_IO_NSEC
+
+/* UART3: LS expansion UART1 */
+#define DEVICE2_BASE		ROUNDDOWN(0xf7113000, CORE_MMU_DEVICE_SIZE)
+#define DEVICE2_SIZE		CORE_MMU_DEVICE_SIZE
+#define DEVICE2_TYPE		MEM_AREA_IO_NSEC
+
+/* UART4 is ?? */
+
+#else
+
 #define DEVICE0_BASE		ROUNDDOWN(CONSOLE_UART_BASE, \
 					  CORE_MMU_DEVICE_SIZE)
 #define DEVICE0_SIZE		CORE_MMU_DEVICE_SIZE
 #define DEVICE0_TYPE		MEM_AREA_IO_NSEC
 
+#endif /* !CFG_DT */
+
 #endif /* PLATFORM_CONFIG_H */

core/arch/arm/plat-imx/main.c

@@ -59,12 +59,12 @@ static void main_fiq(void)
 	panic();
 }
 
-void console_init(void)
+void earlycon_init(void)
 {
 	imx_uart_init(CONSOLE_UART_BASE);
 }
 
-void console_putc(int ch)
+void earlycon_putc(int ch)
 {
 	imx_uart_putc(ch, CONSOLE_UART_BASE);
 
@@ -73,7 +73,7 @@ void console_putc(int ch)
 		imx_uart_putc('\r', CONSOLE_UART_BASE);
 }
 
-void console_flush(void)
+void earlycon_flush(void)
 {
 	imx_uart_flush_tx_fifo(CONSOLE_UART_BASE);
 }

core/arch/arm/plat-ls/main.c

@@ -60,22 +60,22 @@ static void main_fiq(void)
 	panic();
 }
 
-void console_init(void)
+void earlycon_init(void)
 {
 	/*
 	 * Do nothing, uart driver shared with normal world,
 	 * everything for uart driver intialization is done in bootloader.
 	 */
 }
 
-void console_putc(int ch)
+void earlycon_putc(int ch)
 {
 	ns16550_putc(ch, CONSOLE_UART_BASE);
 	if (ch == '\n')
 		ns16550_putc('\r', CONSOLE_UART_BASE);
 }
 
-void console_flush(void)
+void earlycon_flush(void)
 {
 	ns16550_flush(CONSOLE_UART_BASE);
 }

core/arch/arm/plat-mediatek/main.c

@@ -59,21 +59,21 @@ static void main_fiq(void)
 	panic();
 }
 
-void console_init(void)
+void earlycon_init(void)
 {
 	serial8250_uart_init(CONSOLE_UART_BASE,
 			     CONSOLE_UART_CLK_IN_HZ,
 			     CONSOLE_BAUDRATE);
 }
 
-void console_putc(int ch)
+void earlycon_putc(int ch)
 {
 	serial8250_uart_putc(ch, CONSOLE_UART_BASE);
 	if (ch == '\n')
 		serial8250_uart_putc('\r', CONSOLE_UART_BASE);
 }
 
-void console_flush(void)
+void earlycon_flush(void)
 {
 	serial8250_uart_flush_tx_fifo(CONSOLE_UART_BASE);
 }

core/arch/arm/plat-stm/main.c

@@ -60,17 +60,17 @@ static void main_fiq(void)
 	panic();
 }
 
-void console_init(void)
+void earlycon_init(void)
 {
 	asc_init();
 }
 
-void console_putc(int ch)
+void earlycon_putc(int ch)
 {
 	__asc_xmit_char((char)ch);
 }
 
-void console_flush(void)
+void earlycon_flush(void)
 {
 	__asc_flush();
 }

core/arch/arm/plat-sunxi/console.c

@@ -29,17 +29,17 @@
 #include <drivers/sunxi_uart.h>
 #include <console.h>
 
-void console_init(void)
+void earlycon_init(void)
 {
 	sunxi_uart_init(CONSOLE_UART_BASE);
 }
 
-void console_putc(int ch)
+void earlycon_putc(int ch)
 {
 	sunxi_uart_putc(ch, CONSOLE_UART_BASE);
 }
 
-void console_flush(void)
+void earlycon_flush(void)
 {
 	sunxi_uart_flush(CONSOLE_UART_BASE);
 }