pseudo device id

Most platforms have a per-device uinque ID available, but it is
not publicly documented how to access it.  That leads to a
situation on, eg, Hikey where OP-TEE has no way to tell two
Hikey's apart.  For many situations, including OP-TEE's own
"Secure Storage", this destroys security and other functionality.

It's possible that the caller of OP-TEE, arm-trusted-firmware
in aarch64 case has access to identifying unique tokens.  In
that case, it'd be nice if a-t-f could pass it into OP-TEE and
if no access to the real SoC "OTP" per-device identifier, use
this shorter unique token that has a very good chance of being
unique between devices.

This patch enables the code calling OP-TEE to pass in a
uint32_t "pseudo device ID" at startup, which OP-TEE will then
use if the platform sets CFG_OTP_SUPPORT and
CFG_OTP_SUPPORT_PSEUDO_ID.

For aarch64, X7 is used to carry the "pseudo device ID".

Signed-off-by: Andy Green <andy@warmcat.com>

core/arch/arm/include/kernel/generic_boot.h

@@ -34,11 +34,12 @@
 unsigned long cpu_on_handler(unsigned long a0, unsigned long a1);
 struct thread_vector_table *
 generic_boot_init_primary(unsigned long pageable_part, unsigned long unused,
-			  unsigned long fdt);
+			  unsigned long fdt, unsigned long pseudo_device_id);
 unsigned long generic_boot_cpu_on_handler(unsigned long a0, unsigned long a1);
 #else
 void generic_boot_init_primary(unsigned long pageable_part,
-			       unsigned long nsec_entry, unsigned long fdt);
+			       unsigned long nsec_entry, unsigned long fdt,
+			       unsigned long pseudo_device_id);
 void generic_boot_init_secondary(unsigned long nsec_entry);
 #endif
 

core/arch/arm/kernel/generic_boot.c

@@ -35,6 +35,7 @@
 #include <kernel/panic.h>
 #include <kernel/misc.h>
 #include <kernel/asan.h>
+#include <kernel/tee_common_otp.h>
 #include <malloc.h>
 #include <mm/core_mmu.h>
 #include <mm/core_memprot.h>
@@ -72,6 +73,8 @@
  */
 #define PADDR_INVALID		ULONG_MAX
 
+uint32_t pseudo_device_id __early_bss;
+
 #if defined(CFG_BOOT_SECONDARY_REQUEST)
 paddr_t ns_entry_addrs[CFG_TEE_CORE_NB_CORE] __early_bss;
 static uint32_t spin_table[CFG_TEE_CORE_NB_CORE] __early_bss;
@@ -601,7 +604,8 @@ static void init_fdt(unsigned long phys_fdt __unused)
 #endif /*!CFG_DT*/
 
 static void init_primary_helper(unsigned long pageable_part,
-				unsigned long nsec_entry, unsigned long fdt)
+				unsigned long nsec_entry, unsigned long fdt,
+				unsigned long _pseudo_device_id)
 {
 	/*
 	 * Mask asynchronous exceptions before switch to the thread vector
@@ -617,6 +621,8 @@ static void init_primary_helper(unsigned long pageable_part,
 	IMSG("\n");
 	IMSG("Initializing (%s)\n", core_v_str);
 
+	pseudo_device_id = _pseudo_device_id;
+
 	thread_init_primary(generic_boot_get_handlers());
 	thread_init_per_cpu();
 	init_sec_mon(nsec_entry);
@@ -651,9 +657,11 @@ static void init_secondary_helper(unsigned long nsec_entry)
 #if defined(CFG_WITH_ARM_TRUSTED_FW)
 struct thread_vector_table *
 generic_boot_init_primary(unsigned long pageable_part, unsigned long u __unused,
-			  unsigned long fdt)
+			  unsigned long fdt, unsigned long _pseudo_device_id)
 {
-	init_primary_helper(pageable_part, PADDR_INVALID, fdt);
+	init_primary_helper(pageable_part, PADDR_INVALID, fdt,
+			    _pseudo_device_id);
+
 	return &thread_vector_table;
 }
 
@@ -666,9 +674,10 @@ unsigned long generic_boot_cpu_on_handler(unsigned long a0 __maybe_unused,
 }
 #else
 void generic_boot_init_primary(unsigned long pageable_part,
-			       unsigned long nsec_entry, unsigned long fdt)
+			       unsigned long nsec_entry, unsigned long fdt,
+			       unsigned long _pseudo_device_id)
 {
-	init_primary_helper(pageable_part, nsec_entry, fdt);
+	init_primary_helper(pageable_part, nsec_entry, fdt, _pseudo_device_id);
 }
 
 void generic_boot_init_secondary(unsigned long nsec_entry)
@@ -709,3 +718,36 @@ paddr_t generic_boot_core_hpen(void)
 #endif
 }
 #endif
+
+#if defined(CFG_OTP_SUPPORT) && defined(CFG_OTP_SUPPORT_PSEUDO_ID)
+
+/* A-t-f read the 32-bit eMMC CID serial number.  It's kinda-
+ * unique, so the absence of any other stable device-specific bits,
+ * we can use this to make pseudo device-specific ID tokens.
+ */
+
+void tee_otp_get_hw_unique_key(struct tee_hw_unique_key *hwkey)
+{
+	uint8_t *p = (uint8_t *)&pseudo_device_id;
+	size_t n;
+
+	DMSG("%s: pseudo token 0x%x\n", __func__, pseudo_device_id);
+
+	for (n = 0; n < sizeof(hwkey->data); n++)
+		hwkey->data[n] = p[n & 3] ^ 0xff;
+}
+int tee_otp_get_die_id(uint8_t *buffer, size_t len)
+{
+	uint8_t *p = (uint8_t *)&pseudo_device_id;
+	size_t n;
+
+	DMSG("%s: pseudo token 0x%x\n", __func__, pseudo_device_id);
+
+	for (n = 0; n < len; n++)
+		*buffer++ = p[n & 3];
+
+	return 0;
+}
+#endif
+
+

core/arch/arm/kernel/generic_entry_a64.S

@@ -66,6 +66,7 @@
 FUNC _start , :
 	mov	x19, x0		/* Save pagable part address */
 	mov	x20, x2		/* Save DT address */
+	mov	x21, x7		/* Save pseudo unique device ID */
 
 	adr	x0, reset_vect_table
 	msr	vbar_el1, x0
@@ -130,6 +131,7 @@ copy_init:
 	mov	x0, x19		/* pagable part address */
 	mov	x1, #-1
 	mov	x2, x20		/* DT address */
+	mov	x3, x21
 	bl	generic_boot_init_primary
 
 	/*