Skip to content

Commit

Permalink
README: finished call function sub-section. Need to review 4.4 section.
Browse files Browse the repository at this point in the history
  • Loading branch information
Nuno-Jesus committed Aug 2, 2023
1 parent f9b02e1 commit 892be13
Show file tree
Hide file tree
Showing 5 changed files with 10 additions and 8 deletions.
13 changes: 8 additions & 5 deletions README.md
Original file line number Diff line number Diff line change
Expand Up @@ -1414,7 +1414,7 @@ Linux

</details>

<details>
<details open>
<summary><h4>call</h4> - call your own defined functions</summary>

```
Expand All @@ -1426,7 +1426,7 @@ $(call variable,param,param,…)

If you're constantly writing the same complex expressions, you can define a function of your own and assign it the expression. When the times to expand the function, each `param` is assigned to the temporary variables `$(1)`, `$(2)`, etc. As for `$(0)` it receives the variable in `variable`.

Let's assume you need to compile a few sub-Makefiles and echo a message to alert it has been done. Something like this:
Let's assume you need to compile a few sub-Makefiles. You also want to keep track of the progress using some custom messages. Something like this:

```Makefile
all:
Expand All @@ -1446,14 +1446,17 @@ The example below, saved on [code/26-call-example](code/26-call-example) refacto
SUBFOLDERS = folder-1 folder-2 folder-3

define compile
echo "Compiling $(1)"
$(MAKE) -C $(1)
$(info Compiling $(1))
$(MAKE) -C $(1)
endef

all:
$(foreach f, $(SUBFOLDERS), $(call compile, $(f)))
$(foreach folder, $(SUBFOLDERS), $(call compile,$(folder)))

```

Although it might be confusing, the example above simply automates the tasks manually written before. It iterates through the list of subfolders where the Makefiles are at and calls the commands to both log and compile.

</details>


Expand Down
5 changes: 2 additions & 3 deletions code/26-call-example/Makefile
Original file line number Diff line number Diff line change
@@ -1,16 +1,15 @@
SUBFOLDERS = folder-1 folder-2 folder-3

define compile
$(info Compiling $(1))
echo $(1)
$(MAKE) -C $(1)
endef

all:
all:
$(foreach folder, $(SUBFOLDERS), $(call compile,$(folder)))

clean:
$(MAKE) clean -C folder-1
$(MAKE) clean -C folder-2
$(MAKE) clean -C folder-3

.SILENT:
Binary file removed code/26-call-example/folder-1/hello-1.o
Binary file not shown.
Binary file removed code/26-call-example/folder-2/hello-2.o
Binary file not shown.
Binary file removed code/26-call-example/folder-3/hello-3.o
Binary file not shown.

0 comments on commit 892be13

Please sign in to comment.