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Add footprint for Maxim Integrated TSOC-6 (#1248)
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jneiva08 authored and poeschlr committed Jan 22, 2019
1 parent 4d7d615 commit ca0be9d
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39 changes: 39 additions & 0 deletions Package_SO_J-Lead.pretty/TSOC-6_3.76x3.94mm_P1.27mm.kicad_mod
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(module TSOC-6_3.76x3.94mm_P1.27mm (layer F.Cu) (tedit 5C45907A)
(descr "Maxim Integrated TSOC-6 D6+1,https://datasheets.maximintegrated.com/en/ds/DS2401.pdf, https://pdfserv.maximintegrated.com/land_patterns/90-0321.PDF")
(tags TSOC-6)
(attr smd)
(fp_text reference REF** (at 0 -2.9) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value TSOC-6_3.76x3.94mm_P1.27mm (at 0 3) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.7 0.7) (thickness 0.127)))
)
(fp_line (start -1.88 -1.27) (end -1.88 1.97) (layer F.Fab) (width 0.1))
(fp_line (start -1.88 1.97) (end 1.88 1.97) (layer F.Fab) (width 0.1))
(fp_line (start -1.18 -1.97) (end 1.88 -1.97) (layer F.Fab) (width 0.1))
(fp_line (start 1.88 -1.97) (end 1.88 1.97) (layer F.Fab) (width 0.1))
(fp_line (start 0 -2.08) (end 1.99 -2.08) (layer F.SilkS) (width 0.12))
(fp_line (start 1.99 -2.08) (end 1.99 -1.795) (layer F.SilkS) (width 0.12))
(fp_line (start -1.99 1.795) (end -1.99 2.08) (layer F.SilkS) (width 0.12))
(fp_line (start -1.99 2.08) (end 1.99 2.08) (layer F.SilkS) (width 0.12))
(fp_line (start 1.99 1.795) (end 1.99 2.08) (layer F.SilkS) (width 0.12))
(fp_line (start -1.88 -1.27) (end -1.18 -1.97) (layer F.Fab) (width 0.1))
(fp_line (start -2.44 -2.22) (end 2.44 -2.22) (layer F.CrtYd) (width 0.05))
(fp_line (start 2.44 -2.22) (end 2.44 2.22) (layer F.CrtYd) (width 0.05))
(fp_line (start -2.44 -2.22) (end -2.44 2.22) (layer F.CrtYd) (width 0.05))
(fp_line (start -2.44 2.22) (end 2.44 2.22) (layer F.CrtYd) (width 0.05))
(pad 1 smd rect (at -1.525 -1.27) (size 1.33 0.53) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at -1.525 0) (size 1.33 0.53) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at -1.525 1.27) (size 1.33 0.53) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at 1.525 1.27) (size 1.33 0.53) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at 1.525 0) (size 1.33 0.53) (layers F.Cu F.Paste F.Mask))
(pad 6 smd rect (at 1.525 -1.27) (size 1.33 0.53) (layers F.Cu F.Paste F.Mask))
(model ${KISYS3DMOD}/Package_SO_J-Lead.3dshapes/TSOC-6_3.76x3.94mm_P1.27mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
1 change: 1 addition & 0 deletions fp-lib-table
Original file line number Diff line number Diff line change
Expand Up @@ -80,6 +80,7 @@
(lib (name Package_QFP)(type KiCad)(uri ${KISYSMOD}/Package_QFP.pretty)(options "")(descr "Quad Flat Package (QFP)"))
(lib (name Package_SIP)(type KiCad)(uri ${KISYSMOD}/Package_SIP.pretty)(options "")(descr "Single Inline Package(SIP)"))
(lib (name Package_SO)(type KiCad)(uri ${KISYSMOD}/Package_SO.pretty)(options "")(descr "Small Outline Integrated Circuits (SOIC, SSOP, xSOP, xSO)"))
(lib (name Package_SO_J-Lead)(type KiCad)(uri ${KISYSMOD}/Package_SO_J-Lead.pretty)(options "")(descr "Small Outline Integrated Circuits J-Lead"))
(lib (name Package_SON)(type KiCad)(uri ${KISYSMOD}/Package_SON.pretty)(options "")(descr "Small Outline No-Lead (SON)"))
(lib (name Package_TO_SOT_SMD)(type KiCad)(uri ${KISYSMOD}/Package_TO_SOT_SMD.pretty)(options "")(descr "Surface mount transistor packages"))
(lib (name Package_TO_SOT_THT)(type KiCad)(uri ${KISYSMOD}/Package_TO_SOT_THT.pretty)(options "")(descr "Through hole transistor packages"))
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