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[NFC] Realign all source files to clang-format style #2744

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Oct 8, 2024
Merged

[NFC] Realign all source files to clang-format style #2744

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4 changes: 2 additions & 2 deletions lib/SPIRV/LLVMSPIRVOpts.cpp
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Expand Up @@ -54,8 +54,8 @@ void TranslatorOpts::enableAllExtensions() {
#undef EXT
}

bool TranslatorOpts::isUnknownIntrinsicAllowed(IntrinsicInst *II) const
noexcept {
bool TranslatorOpts::isUnknownIntrinsicAllowed(
IntrinsicInst *II) const noexcept {
if (!SPIRVAllowUnknownIntrinsics.has_value())
return false;
const auto &IntrinsicPrefixList = SPIRVAllowUnknownIntrinsics.value();
Expand Down
4 changes: 2 additions & 2 deletions lib/SPIRV/LLVMToSPIRVDbgTran.cpp
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Expand Up @@ -257,8 +257,8 @@ void LLVMToSPIRVDbgTran::transLocationInfo() {
} // Instructions
// Reset current debug line at end of basic block.
BM->setCurrentDebugLine(nullptr);
} // Basic Blocks
} // Functions
} // Basic Blocks
} // Functions
}

// Translation of single debug entry
Expand Down
2 changes: 1 addition & 1 deletion lib/SPIRV/OCLUtil.h
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Expand Up @@ -161,7 +161,7 @@ struct OCLBuiltinTransInfo {
std::string Postfix; // Postfix to be added
/// Postprocessor of operands
std::function<void(BuiltinCallMutator &)> PostProc;
Type *RetTy; // Return type of the translated function
Type *RetTy; // Return type of the translated function
OCLBuiltinTransInfo() : RetTy(nullptr) {
PostProc = [](BuiltinCallMutator &) {};
}
Expand Down
2 changes: 1 addition & 1 deletion lib/SPIRV/SPIRVInternal.h
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Expand Up @@ -61,7 +61,7 @@ using namespace llvm;
namespace llvm {
class IntrinsicInst;
class IRBuilderBase;
}
} // namespace llvm

namespace SPIRV {

Expand Down
8 changes: 3 additions & 5 deletions lib/SPIRV/SPIRVReader.cpp
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Expand Up @@ -4732,7 +4732,8 @@ bool SPIRVToLLVM::transVectorComputeMetadata(SPIRVFunction *BF) {
F->addFnAttr(Attr);
}

if (auto *EM = BF->getExecutionMode(ExecutionModeSharedLocalMemorySizeINTEL)) {
if (auto *EM =
BF->getExecutionMode(ExecutionModeSharedLocalMemorySizeINTEL)) {
unsigned int SLMSize = EM->getLiterals()[0];
Attribute Attr = Attribute::get(*Context, kVCMetadata::VCSLMSize,
std::to_string(SLMSize));
Expand Down Expand Up @@ -4855,10 +4856,7 @@ Instruction *SPIRVToLLVM::transOCLBuiltinFromExtInst(SPIRVExtInst *BC,
auto Args = transValue(BC->getArgValues(), F, BB);
SPIRVDBG(dbgs() << "[transOCLBuiltinFromExtInst] Function: " << *F
<< ", Args: ";
for (auto &I
: Args) dbgs()
<< *I << ", ";
dbgs() << '\n');
for (auto &I : Args) dbgs() << *I << ", "; dbgs() << '\n');
CallInst *CI = CallInst::Create(F, Args, BC->getName(), BB);
setCallingConv(CI);
addFnAttr(CI, Attribute::NoUnwind);
Expand Down
16 changes: 8 additions & 8 deletions lib/SPIRV/SPIRVUtil.cpp
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Expand Up @@ -944,7 +944,7 @@ CallInst *mutateCallInst(
CI->setName(InstName + ".old");
}
auto *NewCI = addCallInst(M, NewName, CI->getType(), Args, Attrs, CI, Mangle,
InstName, TakeFuncName);
InstName, TakeFuncName);
NewCI->setDebugLoc(CI->getDebugLoc());
LLVM_DEBUG(dbgs() << " => " << *NewCI << '\n');
CI->replaceAllUsesWith(NewCI);
Expand All @@ -964,8 +964,8 @@ Instruction *mutateCallInst(
Type *RetTy = CI->getType();
auto NewName = ArgMutate(CI, Args, RetTy);
StringRef InstName = CI->getName();
auto *NewCI = addCallInst(M, NewName, RetTy, Args, Attrs, CI, Mangle, InstName,
TakeFuncName);
auto *NewCI = addCallInst(M, NewName, RetTy, Args, Attrs, CI, Mangle,
InstName, TakeFuncName);
auto *NewI = RetMutate(NewCI);
NewI->takeName(CI);
NewI->setDebugLoc(CI->getDebugLoc());
Expand Down Expand Up @@ -1010,7 +1010,7 @@ CallInst *addCallInst(Module *M, StringRef FuncName, Type *RetTy,
StringRef InstName, bool TakeFuncName) {

auto *F = getOrCreateFunction(M, RetTy, getTypes(Args), FuncName, Mangle,
Attrs, TakeFuncName);
Attrs, TakeFuncName);
InsertPosition InsertPos(nullptr);
if (Pos)
InsertPos = Pos->getIterator();
Expand Down Expand Up @@ -1896,8 +1896,8 @@ bool checkTypeForSPIRVExtendedInstLowering(IntrinsicInst *II, SPIRVModule *BM) {
if ((!Ty->isFloatTy() && !Ty->isDoubleTy() && !Ty->isHalfTy()) ||
(!BM->hasCapability(CapabilityVectorAnyINTEL) &&
((NumElems > 4) && (NumElems != 8) && (NumElems != 16)))) {
BM->SPIRVCK(
false, InvalidFunctionCall, II->getCalledOperand()->getName().str());
BM->SPIRVCK(false, InvalidFunctionCall,
II->getCalledOperand()->getName().str());
return false;
}
break;
Expand All @@ -1912,8 +1912,8 @@ bool checkTypeForSPIRVExtendedInstLowering(IntrinsicInst *II, SPIRVModule *BM) {
if ((!Ty->isIntegerTy()) ||
(!BM->hasCapability(CapabilityVectorAnyINTEL) &&
((NumElems > 4) && (NumElems != 8) && (NumElems != 16)))) {
BM->SPIRVCK(
false, InvalidFunctionCall, II->getCalledOperand()->getName().str());
BM->SPIRVCK(false, InvalidFunctionCall,
II->getCalledOperand()->getName().str());
}
break;
}
Expand Down
49 changes: 23 additions & 26 deletions lib/SPIRV/SPIRVWriter.cpp
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Expand Up @@ -1967,7 +1967,7 @@ void transAliasingMemAccess(SPIRVModule *BM, MDNode *AliasingListMD,
std::vector<uint32_t> &MemoryAccess,
SPIRVWord MemAccessMask) {
if (!BM->isAllowedToUseExtension(
ExtensionID::SPV_INTEL_memory_access_aliasing))
ExtensionID::SPV_INTEL_memory_access_aliasing))
return;
auto *MemAliasList = addMemAliasingINTELInstructions(BM, AliasingListMD);
if (!MemAliasList)
Expand Down Expand Up @@ -3118,20 +3118,17 @@ bool LLVMToSPIRVBase::transAlign(Value *V, SPIRVValue *BV) {
void LLVMToSPIRVBase::transMemAliasingINTELDecorations(Instruction *Inst,
SPIRVValue *BV) {
if (!BM->isAllowedToUseExtension(
ExtensionID::SPV_INTEL_memory_access_aliasing))
ExtensionID::SPV_INTEL_memory_access_aliasing))
return;
if (MDNode *AliasingListMD =
Inst->getMetadata(LLVMContext::MD_alias_scope)) {
auto *MemAliasList =
addMemAliasingINTELInstructions(BM, AliasingListMD);
if (MDNode *AliasingListMD = Inst->getMetadata(LLVMContext::MD_alias_scope)) {
auto *MemAliasList = addMemAliasingINTELInstructions(BM, AliasingListMD);
if (!MemAliasList)
return;
BV->addDecorate(new SPIRVDecorateId(DecorationAliasScopeINTEL, BV,
MemAliasList->getId()));
}
if (MDNode *AliasingListMD = Inst->getMetadata(LLVMContext::MD_noalias)) {
auto *MemAliasList =
addMemAliasingINTELInstructions(BM, AliasingListMD);
auto *MemAliasList = addMemAliasingINTELInstructions(BM, AliasingListMD);
if (!MemAliasList)
return;
BV->addDecorate(
Expand Down Expand Up @@ -4245,41 +4242,41 @@ SPIRVValue *LLVMToSPIRVBase::transIntrinsicInst(IntrinsicInst *II,
}
case Intrinsic::experimental_constrained_fadd: {
auto *BI = BM->addBinaryInst(OpFAdd, transType(II->getType()),
transValue(II->getArgOperand(0), BB),
transValue(II->getArgOperand(1), BB), BB);
transValue(II->getArgOperand(0), BB),
transValue(II->getArgOperand(1), BB), BB);
return applyRoundingModeConstraint(II->getOperand(2), BI);
}
case Intrinsic::experimental_constrained_fsub: {
auto *BI = BM->addBinaryInst(OpFSub, transType(II->getType()),
transValue(II->getArgOperand(0), BB),
transValue(II->getArgOperand(1), BB), BB);
transValue(II->getArgOperand(0), BB),
transValue(II->getArgOperand(1), BB), BB);
return applyRoundingModeConstraint(II->getOperand(2), BI);
}
case Intrinsic::experimental_constrained_fmul: {
auto *BI = BM->addBinaryInst(OpFMul, transType(II->getType()),
transValue(II->getArgOperand(0), BB),
transValue(II->getArgOperand(1), BB), BB);
transValue(II->getArgOperand(0), BB),
transValue(II->getArgOperand(1), BB), BB);
return applyRoundingModeConstraint(II->getOperand(2), BI);
}
case Intrinsic::experimental_constrained_fdiv: {
auto *BI = BM->addBinaryInst(OpFDiv, transType(II->getType()),
transValue(II->getArgOperand(0), BB),
transValue(II->getArgOperand(1), BB), BB);
transValue(II->getArgOperand(0), BB),
transValue(II->getArgOperand(1), BB), BB);
return applyRoundingModeConstraint(II->getOperand(2), BI);
}
case Intrinsic::experimental_constrained_frem: {
auto *BI = BM->addBinaryInst(OpFRem, transType(II->getType()),
transValue(II->getArgOperand(0), BB),
transValue(II->getArgOperand(1), BB), BB);
transValue(II->getArgOperand(0), BB),
transValue(II->getArgOperand(1), BB), BB);
return applyRoundingModeConstraint(II->getOperand(2), BI);
}
case Intrinsic::experimental_constrained_fma: {
std::vector<SPIRVValue *> Args{transValue(II->getArgOperand(0), BB),
transValue(II->getArgOperand(1), BB),
transValue(II->getArgOperand(2), BB)};
auto *BI = BM->addExtInst(transType(II->getType()),
BM->getExtInstSetId(SPIRVEIS_OpenCL),
OpenCLLIB::Fma, Args, BB);
BM->getExtInstSetId(SPIRVEIS_OpenCL),
OpenCLLIB::Fma, Args, BB);
return applyRoundingModeConstraint(II->getOperand(3), BI);
}
case Intrinsic::experimental_constrained_fptoui: {
Expand All @@ -4292,12 +4289,12 @@ SPIRVValue *LLVMToSPIRVBase::transIntrinsicInst(IntrinsicInst *II,
}
case Intrinsic::experimental_constrained_uitofp: {
auto *BI = BM->addUnaryInst(OpConvertUToF, transType(II->getType()),
transValue(II->getArgOperand(0), BB), BB);
transValue(II->getArgOperand(0), BB), BB);
return applyRoundingModeConstraint(II->getOperand(1), BI);
}
case Intrinsic::experimental_constrained_sitofp: {
auto *BI = BM->addUnaryInst(OpConvertSToF, transType(II->getType()),
transValue(II->getArgOperand(0), BB), BB);
transValue(II->getArgOperand(0), BB), BB);
return applyRoundingModeConstraint(II->getOperand(1), BI);
}
case Intrinsic::experimental_constrained_fpext: {
Expand All @@ -4306,7 +4303,7 @@ SPIRVValue *LLVMToSPIRVBase::transIntrinsicInst(IntrinsicInst *II,
}
case Intrinsic::experimental_constrained_fptrunc: {
auto *BI = BM->addUnaryInst(OpFConvert, transType(II->getType()),
transValue(II->getArgOperand(0), BB), BB);
transValue(II->getArgOperand(0), BB), BB);
return applyRoundingModeConstraint(II->getOperand(1), BI);
}
case Intrinsic::experimental_constrained_fcmp:
Expand Down Expand Up @@ -4339,7 +4336,7 @@ SPIRVValue *LLVMToSPIRVBase::transIntrinsicInst(IntrinsicInst *II,
BM->addBinaryInst(OpFMul, Ty, transValue(II->getArgOperand(0), BB),
transValue(II->getArgOperand(1), BB), BB);
auto *BI = BM->addBinaryInst(OpFAdd, Ty, Mul,
transValue(II->getArgOperand(2), BB), BB);
transValue(II->getArgOperand(2), BB), BB);
return applyRoundingModeConstraint(II->getOperand(3), BI);
}
case Intrinsic::fmuladd: {
Expand Down Expand Up @@ -5048,8 +5045,8 @@ SPIRVValue *LLVMToSPIRVBase::transIntrinsicInst(IntrinsicInst *II,
else
// Other LLVM intrinsics shouldn't get to SPIRV, because they
// can't be represented in SPIRV or aren't implemented yet.
BM->SPIRVCK(
false, InvalidFunctionCall, II->getCalledOperand()->getName().str());
BM->SPIRVCK(false, InvalidFunctionCall,
II->getCalledOperand()->getName().str());
}
return nullptr;
}
Expand Down
4 changes: 1 addition & 3 deletions lib/SPIRV/libSPIRV/SPIRVDebug.h
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Expand Up @@ -79,9 +79,7 @@ void verifyRegularizationPass(llvm::Module &, const std::string &);
}

// Output stream for SPIRV debug information.
inline spv_ostream &spvdbgs() {
return std::cerr;
}
inline spv_ostream &spvdbgs() { return std::cerr; }

#else

Expand Down
6 changes: 2 additions & 4 deletions lib/SPIRV/libSPIRV/SPIRVErrorEnum.h
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Expand Up @@ -23,10 +23,8 @@ _SPIRV_OP(Requires1_1, "Feature requires SPIR-V 1.1 or greater:")
_SPIRV_OP(RequiresVersion, "Cannot fulfill SPIR-V version restriction:\n")
_SPIRV_OP(RequiresExtension,
"Feature requires the following SPIR-V extension:\n")
_SPIRV_OP(InvalidMagicNumber,
"Invalid Magic Number.")
_SPIRV_OP(InvalidVersionNumber,
"Invalid Version Number.")
_SPIRV_OP(InvalidMagicNumber, "Invalid Magic Number.")
_SPIRV_OP(InvalidVersionNumber, "Invalid Version Number.")
_SPIRV_OP(UnspecifiedMemoryModel, "Unspecified Memory Model.")
_SPIRV_OP(RepeatedMemoryModel, "Expects a single OpMemoryModel instruction.")
_SPIRV_OP(UnsupportedVarArgFunction,
Expand Down
8 changes: 3 additions & 5 deletions lib/SPIRV/libSPIRV/SPIRVInstruction.h
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Expand Up @@ -327,9 +327,7 @@ class SPIRVInstTemplateBase : public SPIRVInstruction {
return getOpValue(I);
}

virtual SPIRVValue *getOperand(unsigned I) {
return getOpValue(I);
}
virtual SPIRVValue *getOperand(unsigned I) { return getOpValue(I); }

bool hasExecScope() const { return SPIRV::hasExecScope(OpCode); }

Expand Down Expand Up @@ -415,12 +413,12 @@ class SPIRVMemoryAccess {
}
if (MemoryAccess[0] & MemoryAccessAliasScopeINTELMaskMask) {
assert(MemoryAccess.size() > MemAccessNumParam &&
"Aliasing operand is missing");
"Aliasing operand is missing");
AliasScopeInstID = MemoryAccess[MemAccessNumParam++];
}
if (MemoryAccess[0] & MemoryAccessNoAliasINTELMaskMask) {
assert(MemoryAccess.size() > MemAccessNumParam &&
"Aliasing operand is missing");
"Aliasing operand is missing");
NoAliasInstID = MemoryAccess[MemAccessNumParam++];
}

Expand Down
5 changes: 3 additions & 2 deletions lib/SPIRV/libSPIRV/SPIRVMemAliasingINTEL.h
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Expand Up @@ -51,7 +51,8 @@ class SPIRVMemAliasingINTELGeneric : public SPIRVEntry {
SPIRVMemAliasingINTELGeneric(SPIRVModule *TheModule, SPIRVId TheId,
const std::vector<SPIRVId> &TheArgs)
: SPIRVEntry(TheModule, TheArgs.size() + TheFixedWordCount, TheOpCode,
TheId), Args(TheArgs) {
TheId),
Args(TheArgs) {
SPIRVMemAliasingINTELGeneric::validate();
assert(TheModule && "Invalid module");
}
Expand Down Expand Up @@ -90,5 +91,5 @@ _SPIRV_OP(AliasScopeDeclINTEL, 2)
_SPIRV_OP(AliasScopeListDeclINTEL, 2)
#undef _SPIRV_OP

} // SPIRV
} // namespace SPIRV
#endif // SPIRV_LIBSPIRV_SPIRVMEMALIASINGINTEL_H
15 changes: 8 additions & 7 deletions lib/SPIRV/libSPIRV/SPIRVModule.h
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Expand Up @@ -486,12 +486,14 @@ class SPIRVModule {
virtual SPIRVInstruction *addSampledImageInst(SPIRVType *, SPIRVValue *,
SPIRVValue *,
SPIRVBasicBlock *) = 0;
virtual SPIRVEntry *getOrAddAliasDomainDeclINTELInst(
std::vector<SPIRVId> Args, llvm::MDNode *MD) = 0;
virtual SPIRVEntry *getOrAddAliasScopeDeclINTELInst(
std::vector<SPIRVId> Args, llvm::MDNode *MD) = 0;
virtual SPIRVEntry *getOrAddAliasScopeListDeclINTELInst(
std::vector<SPIRVId> Args, llvm::MDNode *MD) = 0;
virtual SPIRVEntry *
getOrAddAliasDomainDeclINTELInst(std::vector<SPIRVId> Args,
llvm::MDNode *MD) = 0;
virtual SPIRVEntry *getOrAddAliasScopeDeclINTELInst(std::vector<SPIRVId> Args,
llvm::MDNode *MD) = 0;
virtual SPIRVEntry *
getOrAddAliasScopeListDeclINTELInst(std::vector<SPIRVId> Args,
llvm::MDNode *MD) = 0;
virtual SPIRVInstruction *addAssumeTrueKHRInst(SPIRVValue *Condition,
SPIRVBasicBlock *BB) = 0;
virtual SPIRVInstruction *addExpectKHRInst(SPIRVType *ResultTy,
Expand Down Expand Up @@ -603,7 +605,6 @@ class SPIRVModule {
bool IsValid;
};


#ifdef _SPIRV_SUPPORT_TEXT_FMT

/// Convert SPIR-V between binary and internel text formats.
Expand Down
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