This repository contains complete source code and buillding files for the KPU - a RISC based CPU (Central Processing Unit). The whole CPU is emulated, simulated, and modelled on the lowest level only with primitive AND, OR, XOR, and NOT gates.
It implements a 8-bit wide Data Bus, and a 16-bit wide Address Bus. The following 8-bit wide registers are implemented:
- D (General Purpose)
- E (General Purpose)
- F (General Purpose)
- G (General Purpose)
- H (General Purpose)
- XL (Lower part of the 16-bit wide "X" register
- XH (Upper part of the 16-bit wide "X" register
The following 16-bit wide registers are implemented:
- SP (Stack Pointer)
- BP (Base Pointer)
- PC (Program Counter)
- M (Memory Addressing)
- J (Jump Destination Addressing)
- X (General Purpose)
- Y (General Purpose)
- Z (General Purpose)
The project contains the following sub components:
- Assembler: The Assembler generates from the assembly language binary code that can be executed by the CPU. It is written in C#, and uses ANTLR for the syntax processing.
- Emulation: The C#-based Emulator is able to run binary code in a Console application or within a WinForms application (used for debugging purposes).
- VHDL: This folder contains the whole CPU implementation as VHDL description files.
- Eagle: This folder contains the whole schematics and board files ready for a physical implementation of the CPU based on 74LS TTL logic chips.
- Logicly: This folder contains early Proof-Of-Concept files for the Logicly simulation program.
For more detailed technical information about the CPU, please visit the project website at http://www.cpu-design.at