Fix ASR instruction (AArch64)

JonathanSalwan · Aug 2, 2023 · 87b0830 · 87b0830
1 parent 5b59292
commit 87b0830
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Showing 2 changed files with 9 additions and 1 deletion.
diff --git a/src/libtriton/arch/arm/aarch64/aarch64Semantics.cpp b/src/libtriton/arch/arm/aarch64/aarch64Semantics.cpp
@@ -1128,10 +1128,14 @@ namespace triton {
           auto& dst  = inst.operands[0];
           auto& src1 = inst.operands[1];
           auto& src2 = inst.operands[2];
+          auto  size = src2.getBitSize();
 
           /* Create symbolic operands */
           auto op1 = this->symbolicEngine->getOperandAst(inst, src1);
-          auto op2 = this->symbolicEngine->getOperandAst(inst, src2);
+          auto op2 = this->astCtxt->bvand(
+                       this->symbolicEngine->getOperandAst(inst, src2),
+                       this->astCtxt->bv(size - 1,  size)
+                     );
 
           /* Create the semantics */
           auto node = this->astCtxt->bvashr(op1, op2);

diff --git a/src/testers/aarch64/unicorn_test_aarch64.py b/src/testers/aarch64/unicorn_test_aarch64.py
@@ -213,6 +213,10 @@
     (b"\x42\x00\x80\xd2", "movz x2, #0x2"),
     (b"\x20\x28\xc2\x9a", "asr x0, x1, x2"),
 
+    (b"\x20\x28\x88\xd2", "movz x0, #0x4141"),
+    (b"\x20\x28\xa8\xf2", "movk x0, #0x4141, lsl #16"),
+    (b"\x01\x28\xc0\x1a", "asr w1, w0, w0"),
+
     (b"\x82\x46\x82\xd2", "movz x2, #0x1234"),
     (b"\x01\xcf\x8a\xd2", "movz x1, #0x5678"),
     (b"\x20\x80\x22\xcb", "sub x0, x1, w2, sxtb"),