Lab 03

NCTU OSDI Lab 3: Exception and Interrupt

Documentation: Lab 3

Implement ISR for PL011 UART

Required

• Required 1
  • Set up the exception vector table.
  • Implement the exception handler for Synchronous Exceptions from the currentEL while using SP_ELx (offset 0x200-0x280 in the vector table).
  • Add an exc command to the shell. It issues svc #1 and then your exception handler should print the return address, EC field, and ISS field.
• Remove the infinite loop in exception_handler function and add eret at the end of ISRs. Observe the difference between saving and not saving general registers.
• Required 3
  • Implement IRQ handler for IRQ Exception from the current EL while using SP_ELx. (offset 0x280-0x300 in the vector table)
  • Implement the arm core timer handler. Add irq command to the shell to enable timer.
• Required 4
  • Return from EL2 to EL1 and set the corresponding handlers.
  • Return from EL1 to EL0 and run shell in EL0.
  • Reimplement irq command by system call.

Elective

• Pick another timer and implement its handler.
• Implement ISR for either mini UART or PL011 UART.
• Use a long delay to simulate bottom half of ISR. Compare the difference between enabling and not enabling interrupt after top half of ISR.

Questions

• Change svc instruction to brk (breakpoint) instruction. See the difference in ELR_EL2(return address). Explain why there is a difference.
• Do you need to save floating point SIMD registers in ISRs? Why or why not.
• What will happen if you don’t clear peripherals’ interrupt signal?