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JeffDeColaJeffDeCola
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added lifo synchronous
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‎docs/pics/sequential-logic/fifo_asynchronous-waveform.jpg

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‎docs/pics/sequential-logic/fifo_synchronous.jpg

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‎docs/pics/sequential-logic/lifo_compare_and_status.jpg

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‎docs/pics/sequential-logic/lifo_synchronous-waveform.jpg

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‎docs/pics/sequential-logic/lifo_synchronous.jpg

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‎sequential-logic/memory/fifo_asynchronous/fifo_asynchronous_tb.gtkw

Lines changed: 8 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
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[*]
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[*] GTKWave Analyzer v3.3.115 (w)1999-2023 BSI
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[*] Sun May 21 22:01:02 2023
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[*] Sun May 21 22:22:11 2023
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[*]
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[dumpfile] "/home/jeff/verilog/my-verilog-examples/sequential-logic/memory/fifo_asynchronous/fifo_asynchronous_tb.vcd"
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[dumpfile_mtime] "Sun May 21 22:00:22 2023"
@@ -23,9 +23,11 @@ FIFO_ASYNCHRONOUS_TB.RRST
2323
@200
2424
-
2525
@28
26-
FIFO_ASYNCHRONOUS_TB.FULL
26+
FIFO_ASYNCHRONOUS_TB.POP
2727
@22
2828
FIFO_ASYNCHRONOUS_TB.DATA_IN[7:0]
29+
@29
30+
FIFO_ASYNCHRONOUS_TB.FULL
2931
@200
3032
-
3133
@28
@@ -35,14 +37,16 @@ FIFO_ASYNCHRONOUS_TB.UUT_fifo_asynchronous_structural.w_ptr[3:0]
3537
@200
3638
-
3739
@28
38-
FIFO_ASYNCHRONOUS_TB.EMPTY
40+
FIFO_ASYNCHRONOUS_TB.PUSH
3941
@22
4042
FIFO_ASYNCHRONOUS_TB.DATA_OUT[7:0]
43+
@28
44+
FIFO_ASYNCHRONOUS_TB.EMPTY
4145
@200
4246
-
4347
@28
4448
FIFO_ASYNCHRONOUS_TB.UUT_fifo_asynchronous_structural.r_next
45-
@23
49+
@22
4650
FIFO_ASYNCHRONOUS_TB.UUT_fifo_asynchronous_structural.r_ptr[3:0]
4751
[pattern_trace] 1
4852
[pattern_trace] 0

‎sequential-logic/memory/fifo_synchronous/fifo_synchronous_tb.gtkw

Lines changed: 9 additions & 7 deletions
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@@ -1,30 +1,32 @@
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[*]
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[*] GTKWave Analyzer v3.3.115 (w)1999-2023 BSI
3-
[*] Sun May 21 19:27:58 2023
3+
[*] Sun May 21 22:22:24 2023
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[*]
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[dumpfile] "/home/jeff/verilog/my-verilog-examples/sequential-logic/memory/fifo_synchronous/fifo_synchronous_tb.vcd"
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[dumpfile_mtime] "Sun May 21 19:21:47 2023"
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[dumpfile_size] 7737
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[savefile] "/home/jeff/verilog/my-verilog-examples/sequential-logic/memory/fifo_synchronous/fifo_synchronous_tb.gtkw"
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[timestart] 0
10-
[size] 1652 853
11-
[pos] 180 82
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[size] 1652 811
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[pos] 172 102
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*-16.943726 70000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
1313
[treeopen] FIFO_SYNCHRONOUS_TB.
1414
[treeopen] FIFO_SYNCHRONOUS_TB.UUT_fifo_synchronous_structural.
1515
[sst_width] 204
1616
[signals_width] 214
1717
[sst_expanded] 1
18-
[sst_vpaned_height] 239
18+
[sst_vpaned_height] 226
1919
@28
2020
FIFO_SYNCHRONOUS_TB.CLK
2121
FIFO_SYNCHRONOUS_TB.RST
2222
@200
2323
-
2424
@28
25-
FIFO_SYNCHRONOUS_TB.FULL
25+
FIFO_SYNCHRONOUS_TB.PUSH
2626
@22
2727
FIFO_SYNCHRONOUS_TB.DATA_IN[7:0]
28+
@28
29+
FIFO_SYNCHRONOUS_TB.FULL
2830
@200
2931
-
3032
@28
@@ -33,6 +35,8 @@ FIFO_SYNCHRONOUS_TB.UUT_fifo_synchronous_structural.w_next
3335
FIFO_SYNCHRONOUS_TB.UUT_fifo_synchronous_structural.w_ptr[3:0]
3436
@200
3537
-
38+
@29
39+
FIFO_SYNCHRONOUS_TB.POP
3640
@28
3741
FIFO_SYNCHRONOUS_TB.EMPTY
3842
@22
@@ -43,7 +47,5 @@ FIFO_SYNCHRONOUS_TB.DATA_OUT[7:0]
4347
FIFO_SYNCHRONOUS_TB.UUT_fifo_synchronous_structural.r_next
4448
@22
4549
FIFO_SYNCHRONOUS_TB.UUT_fifo_synchronous_structural.r_ptr[3:0]
46-
@200
47-
-
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[pattern_trace] 1
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[pattern_trace] 0

‎sequential-logic/memory/lifo_synchronous/README.md

Lines changed: 107 additions & 69 deletions
Original file line numberDiff line numberDiff line change
@@ -22,9 +22,9 @@ Documentation and Reference
2222

2323
## OVERVIEW
2424

25-
A FIFO is a special type of buffer. The name FIFO stands for first in first out
26-
and means that the data written into the buffer first comes out of it first.
27-
A synchronous FIFO is a FIFO where the same clock is used for both reading and
25+
A FIFO is a special type of buffer. The name LIFO stands for lst in first out
26+
and means that the data written into the buffer last comes out of it first.
27+
A synchronous LIFO is a LIFO where the same clock is used for both reading and
2828
writing.
2929

3030
_I used
@@ -47,7 +47,7 @@ The structure is,
4747

4848
The full and empy logic is,
4949

50-
![IMAGE - fifo_compare_and_status.jpg - IMAGE](../../../docs/pics/sequential-logic/fifo_compare_and_status.jpg)
50+
![IMAGE - fifo_compare_and_status.jpg - IMAGE](../../../docs/pics/sequential-logic/lifo_compare_and_status.jpg)
5151

5252
## TRUTH TABLE
5353

@@ -56,25 +56,25 @@ but I wanted to show all the cases.
5656
It's really just pushing and popping data
5757
off the FIFO.
5858

59-
| rst | we | full | data_in | re | empty | data_out | comment |
60-
|:---:|:--:|:----:|:--------:|:--:|:-----:|:--------:|:----------------:|
61-
| 1 | 0 | 0 | xxxxxxxx | 0 | 0 | xxxxxxxx | RESETS PTRS |
62-
| 0 | 0 | 0 | xxxxxxxx | 0 | 0 | data_out | - |
63-
| 0 | 0 | 0 | xxxxxxxx | 0 | 1 | data_out | EMPTY |
64-
| 0 | 0 | 0 | xxxxxxxx | 1 | 0 | POP | POP |
65-
| 0 | 0 | 0 | xxxxxxxx | 1 | 1 | data_out | NO POP - EMPTY |
66-
| 0 | 0 | 1 | xxxxxxxx | 0 | 0 | data_out | FULL |
67-
| 0 | 0 | 1 | xxxxxxxx | 0 | 1 | - | N/A |
68-
| 0 | 0 | 1 | xxxxxxxx | 1 | 0 | POP | FULL - POP |
69-
| 0 | 0 | 1 | xxxxxxxx | 1 | 1 | - | N/A |
70-
| 0 | 1 | 0 | data | 0 | 0 | data_out | PUSH |
71-
| 0 | 1 | 0 | data | 0 | 1 | data_out | PUSH - EMPTY |
72-
| 0 | 1 | 0 | data | 1 | 0 | POP | PUSH - POP |
73-
| 0 | 1 | 0 | data | 1 | 1 | data_out | N/A |
74-
| 0 | 1 | 1 | xxxxxxxx | 0 | 0 | data_out | NO PUSH - FULL |
75-
| 0 | 1 | 1 | xxxxxxxx | 0 | 1 | data_out | N/A |
76-
| 0 | 1 | 1 | xxxxxxxx | 1 | 0 | POP | N/A |
77-
| 0 | 1 | 1 | xxxxxxxx | 1 | 1 | data_out | N/A |
59+
| rst | push | full | data_in | pop | empty | data_out | comment |
60+
|:---:|:----:|:----:|:--------:|:---:|:-----:|:--------:|:----------------:|
61+
| 1 | 0 | 0 | xxxxxxxx | 0 | 0 | xxxxxxxx | RESETS PTR |
62+
| 0 | 0 | 0 | xxxxxxxx | 0 | 0 | data_out | - |
63+
| 0 | 0 | 0 | xxxxxxxx | 0 | 1 | data_out | EMPTY |
64+
| 0 | 0 | 0 | xxxxxxxx | 1 | 0 | POP | POP |
65+
| 0 | 0 | 0 | xxxxxxxx | 1 | 1 | data_out | NO POP - EMPTY |
66+
| 0 | 0 | 1 | xxxxxxxx | 0 | 0 | data_out | FULL |
67+
| 0 | 0 | 1 | xxxxxxxx | 0 | 1 | - | N/A |
68+
| 0 | 0 | 1 | xxxxxxxx | 1 | 0 | POP | FULL - POP |
69+
| 0 | 0 | 1 | xxxxxxxx | 1 | 1 | - | N/A |
70+
| 0 | 1 | 0 | data | 0 | 0 | data_out | PUSH |
71+
| 0 | 1 | 0 | data | 0 | 1 | data_out | PUSH - EMPTY |
72+
| 0 | 1 | 0 | data | 1 | 0 | POP | PUSH - POP |
73+
| 0 | 1 | 0 | data | 1 | 1 | data_out | N/A |
74+
| 0 | 1 | 1 | xxxxxxxx | 0 | 0 | data_out | NO PUSH - FULL |
75+
| 0 | 1 | 1 | xxxxxxxx | 0 | 1 | data_out | N/A |
76+
| 0 | 1 | 1 | xxxxxxxx | 1 | 0 | POP | N/A |
77+
| 0 | 1 | 1 | xxxxxxxx | 1 | 1 | data_out | N/A |
7878

7979
## VERILOG CODE
8080

@@ -104,69 +104,53 @@ behavioral model,
104104
end
105105
```
106106

107-
### WRITE AND READ PTRS
107+
### STACK PTRS
108108

109-
```verilog
110-
// ALWAYS BLOCK with NON-BLOCKING PROCEDURAL ASSIGNMENT STATEMENT
111-
always @ (posedge clk) begin
112-
if (rst) begin
113-
w_ptr <= 3'b000;
114-
end else if (w_next) begin
115-
w_ptr <= w_ptr + 1;
116-
end else begin
117-
w_ptr <= w_ptr;
118-
end
119-
end
120-
```
109+
The top memory location is unused since the logic required to utilize that location
110+
would take up more real estate than it's worth.
121111

122112
```verilog
123113
// ALWAYS BLOCK with NON-BLOCKING PROCEDURAL ASSIGNMENT STATEMENT
124114
always @ (posedge clk) begin
115+
//RESET
125116
if (rst) begin
126-
r_ptr <= 3'b000;
117+
wrt_ptr <= 4'b0000;
118+
rd_ptr <= 4'b0000;
119+
// BOTTOM - PUSH
120+
end else if ((wrt_ptr == 4'b0000) & (w_next)) begin
121+
wrt_ptr <= wrt_ptr + 1;
122+
// BOTTOM - POP
123+
end else if ((rd_ptr == 4'b0000) & (r_next)) begin
124+
wrt_ptr <= 4'b0000;
125+
// PUSH
126+
end else if (w_next) begin
127+
wrt_ptr <= wrt_ptr + 1;
128+
rd_ptr <= rd_ptr + 1;
129+
// POP
127130
end else if (r_next) begin
128-
r_ptr <= r_ptr + 1;
129-
end else begin
130-
r_ptr <= r_ptr;
131+
wrt_ptr <= wrt_ptr - 1;
132+
rd_ptr <= rd_ptr - 1;
131133
end
132134
end
133135
```
134136

135137
### COMPARE AND STATUS LOGIC
136138

137139
```verilog
138-
parameter depth = 4'b1111; // Depth of the FIFO
139-
140-
// DATA TYPES
141-
reg [3:0] ptr_diff;
142-
143-
// FULL STATUS
144-
always @(*) begin
145-
if (ptr_diff == depth) begin
146-
full = 1'b1;
147-
end else begin
148-
full = 1'b0;
149-
end
150-
end
151-
152-
// EMPTY STATUS
153-
always @(*) begin
154-
if (ptr_diff == 0) begin
155-
empty = 1'b1;
156-
end else begin
157-
empty = 1'b0;
158-
end
159-
end
140+
parameter depth = 4'b1111; // Depth of the FIFO
160141
161142
// HOW MUCH MEMORY USED
162143
// ALWAYS BLOCK with NON-BLOCKING PROCEDURAL ASSIGNMENT STATEMENT
163144
always @(*) begin
164-
if (w_ptr > r_ptr) begin
165-
ptr_diff <= w_ptr - r_ptr + 1;
166-
end else if (w_ptr < r_ptr) begin
167-
ptr_diff <= (depth - r_ptr) + w_ptr + 1;
168-
end else if (w_ptr == r_ptr) begin
169-
ptr_diff <= 0;
145+
if (wrt_ptr == 0) begin
146+
full <= 1'b0;
147+
empty <= 1'b1;
148+
end else if (wrt_ptr < depth) begin
149+
full <= 1'b0;
150+
empty <= 1'b0;
151+
end else if (wrt_ptr == depth) begin
152+
full <= 1'b1;
153+
empty <= 1'b0;
170154
end
171155
end
172156
```
@@ -204,7 +188,61 @@ vvp lifo_synchronous_tb.vvp
204188
The output of the test,
205189

206190
```text
207-
??????
191+
TEST START --------------------------------
192+
193+
| TIME(ns) | RST | PUSH | FULL | DATA_IN | POP | EMPTY | DATA_OUT |
194+
----------------------------------------------------------------
195+
1 INIT | 15 | 0 | 0 | x | xxxxxxxx | 0 | x | xxxxxxxx |
196+
2 RESET | 35 | 1 | 0 | 0 | xxxxxxxx | 0 | 1 | xxxxxxxx |
197+
3 PUSH-1 | 55 | 0 | 1 | 0 | 00001111 | 0 | 0 | xxxxxxxx |
198+
4 PUSH-2 | 75 | 0 | 1 | 0 | 11110000 | 0 | 0 | 00001111 |
199+
5 PUSH-3 | 95 | 0 | 1 | 0 | 10101010 | 0 | 0 | 11110000 |
200+
6 - | 115 | 0 | 0 | 0 | xxxxxxxx | 0 | 0 | 10101010 |
201+
7 - | 135 | 0 | 0 | 0 | xxxxxxxx | 0 | 0 | 10101010 |
202+
8 - | 155 | 0 | 0 | 0 | xxxxxxxx | 0 | 0 | 10101010 |
203+
9 POP-3 | 175 | 0 | 0 | 0 | xxxxxxxx | 1 | 0 | 10101010 |
204+
10 POP-2 | 195 | 0 | 0 | 0 | xxxxxxxx | 1 | 0 | 11110000 |
205+
11 POP-1 | 215 | 0 | 0 | 0 | xxxxxxxx | 1 | 1 | 00001111 |
206+
12 POP-NULL | 235 | 0 | 0 | 0 | xxxxxxxx | 1 | 1 | 00001111 |
207+
13 POP-NULL | 255 | 0 | 0 | 0 | xxxxxxxx | 1 | 1 | 00001111 |
208+
14 POP-NULL | 275 | 0 | 0 | 0 | xxxxxxxx | 1 | 1 | 00001111 |
209+
15 - | 295 | 0 | 0 | 0 | xxxxxxxx | 0 | 1 | 00001111 |
210+
16 - | 315 | 0 | 0 | 0 | xxxxxxxx | 0 | 1 | 00001111 |
211+
17 - | 335 | 0 | 0 | 0 | xxxxxxxx | 0 | 1 | 00001111 |
212+
18 PUSH-1 | 355 | 0 | 1 | 0 | 00001111 | 0 | 0 | 00001111 |
213+
19 PUSH-2 | 375 | 0 | 1 | 0 | 11110000 | 0 | 0 | 00001111 |
214+
20 PUSH-3 | 395 | 0 | 1 | 0 | 10101010 | 0 | 0 | 11110000 |
215+
21 PUSH-4 | 415 | 0 | 1 | 0 | 01001111 | 0 | 0 | 10101010 |
216+
22 PUSH-5 | 435 | 0 | 1 | 0 | 11110000 | 0 | 0 | 01001111 |
217+
23 POP-5 | 455 | 0 | 0 | 0 | xxxxxxxx | 1 | 0 | 11110000 |
218+
24 POP-4 | 475 | 0 | 0 | 0 | xxxxxxxx | 1 | 0 | 01001111 |
219+
25 PUSH-4 | 495 | 0 | 1 | 0 | 10101011 | 0 | 0 | 10101010 |
220+
26 PUSH-5 | 515 | 0 | 1 | 0 | 00001110 | 0 | 0 | 10101011 |
221+
27 PUSH-6 | 535 | 0 | 1 | 0 | 11110001 | 0 | 0 | 00001110 |
222+
28 PUSH-7 | 555 | 0 | 1 | 0 | 10101000 | 0 | 0 | 11110001 |
223+
29 PUSH-8 | 575 | 0 | 1 | 0 | 10111000 | 0 | 0 | 10101000 |
224+
30 PUSH-9 | 595 | 0 | 1 | 0 | 10111000 | 0 | 0 | 10111000 |
225+
31 PUSH-10 | 615 | 0 | 1 | 0 | 10111000 | 0 | 0 | 10111000 |
226+
32 PUSH-11 | 635 | 0 | 1 | 0 | 10111000 | 0 | 0 | 10111000 |
227+
33 PUSH-12 | 655 | 0 | 1 | 0 | 10111001 | 0 | 0 | 10111000 |
228+
34 PUSH-13 | 675 | 0 | 1 | 0 | 10111010 | 0 | 0 | 10111001 |
229+
35 PUSH-14 | 695 | 0 | 1 | 0 | 10111100 | 0 | 0 | 10111010 |
230+
36 PUSH-15 | 715 | 0 | 1 | 1 | 00110000 | 0 | 0 | 10111100 |
231+
37 PUSH-NULL | 735 | 0 | 1 | 1 | 01011000 | 0 | 0 | 00110000 |
232+
38 PUSH-NULL | 755 | 0 | 1 | 1 | 00001011 | 0 | 0 | 00110000 |
233+
39 PUSH-NULL | 775 | 0 | 1 | 1 | 00011111 | 0 | 0 | 00110000 |
234+
40 - | 795 | 0 | 0 | 1 | xxxxxxxx | 0 | 0 | 00110000 |
235+
41 - | 815 | 0 | 0 | 1 | xxxxxxxx | 0 | 0 | 00110000 |
236+
42 - | 835 | 0 | 0 | 1 | xxxxxxxx | 0 | 0 | 00110000 |
237+
43 POP-15 | 855 | 0 | 0 | 0 | xxxxxxxx | 1 | 0 | 00110000 |
238+
44 POP-14 | 875 | 0 | 0 | 0 | xxxxxxxx | 1 | 0 | 10111100 |
239+
45 POP-13 | 895 | 0 | 0 | 0 | xxxxxxxx | 1 | 0 | 10111010 |
240+
46 POP-12 | 915 | 0 | 0 | 0 | xxxxxxxx | 1 | 0 | 10111001 |
241+
242+
VECTORS: 46
243+
ERRORS: 0
244+
245+
TEST END ----------------------------------
208246
```
209247

210248
## VIEW WAVEFORM

‎sequential-logic/memory/lifo_synchronous/lifo_synchronous.v

Lines changed: 11 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -4,10 +4,10 @@ module lifo_synchronous_structural(
44
input clk, // Clock
55
input rst, // Reset
66
input [7:0] data_in, // DATA In
7-
input we, // Write enable
7+
input push, // Write enable
88
output full, // Full
99
output [7:0] data_out, // DATA Out
10-
input re, // Read enable
10+
input pop, // Read enable
1111
output empty); // Empty
1212

1313
//FIFO
@@ -16,7 +16,7 @@ module lifo_synchronous_structural(
1616
// parameter RAM_DEPTH = (1 << ADDR_WIDTH);
1717

1818
// DATA TYPES
19-
wire [3:0] stack_ptr;
19+
wire [3:0] wrt_ptr, rd_ptr;
2020
wire w_next;
2121
wire r_next;
2222
parameter zeros = 8'h00;
@@ -25,24 +25,24 @@ module lifo_synchronous_structural(
2525
// 16x8 dual port RAM
2626
dual_port_ram_synchronous_behavioral dual_port_ram_synchronous(
2727
.clk(clk),
28-
.we_A(we),
28+
.we_A(push),
2929
.we_B(zero),
30-
.addr_A(stack_ptr),
31-
.addr_B(stack_ptr),
30+
.addr_A(wrt_ptr),
31+
.addr_B(rd_ptr),
3232
.data_in_A(data_in),
3333
.data_in_B(zeros),
3434
.data_out_A(),
3535
.data_out_B(data_out)
3636
);
3737

3838
write_logic write_logic(
39-
.we(we),
39+
.we(push),
4040
.full(full),
4141
.w_next(w_next)
4242
);
4343

4444
read_logic read_logic(
45-
.re(re),
45+
.re(pop),
4646
.empty(empty),
4747
.r_next(r_next)
4848
);
@@ -52,11 +52,12 @@ module lifo_synchronous_structural(
5252
.rst(rst),
5353
.w_next(w_next),
5454
.r_next(r_next),
55-
.stack_ptr(stack_ptr)
55+
.wrt_ptr(wrt_ptr),
56+
.rd_ptr(rd_ptr)
5657
);
5758

5859
compare_and_status_logic compare_and_status_logic(
59-
.stack_ptr(stack_ptr),
60+
.wrt_ptr(wrt_ptr),
6061
.full(full),
6162
.empty(empty)
6263
);

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