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6 changes: 3 additions & 3 deletions README.md
Original file line number Diff line number Diff line change
Expand Up @@ -32,9 +32,9 @@ conda build --croot=C:/tmp conda-recipe
conda install dpctl
```

Using PyDPPL
============
PyDPPL relies on SYCL runtime. With Intel oneAPI installed you should activate it.
Using dpCtl
===========
dpCtl relies on DPC++ runtime. With Intel oneAPI installed you should activate it.

On Windows:
```cmd
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4 changes: 2 additions & 2 deletions backends/CMakeLists.txt
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
cmake_minimum_required(VERSION 3.3.2 FATAL_ERROR)
project("PyDPPL - A lightweight SYCL wrapper for Python")
project("dpCtl - A lightweight SYCL wrapper for Python")

# The function checks is DPCPP_ROOT is valid and points to a dpcpp installation
function (check_for_dpcpp)
Expand Down Expand Up @@ -185,7 +185,7 @@ foreach(HEADER ${HEADERS})
install(FILES "${HEADER}" DESTINATION include/Support)
endforeach()

# Enable to build the PyDPPL backend test cases
# Enable to build the dpCtl backend test cases
add_subdirectory(tests)

# Todo : Add build rules for doxygen
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2 changes: 1 addition & 1 deletion backends/include/Support/CBindingWrapping.h
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===----- Support/CBindingWrapping.h - DPPL-SYCL interface --*-- C ---*---===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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2 changes: 1 addition & 1 deletion backends/include/Support/DllExport.h
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===---------- Support/DllExport.h - DPPL-SYCL interface ---*--- C ---*---===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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2 changes: 1 addition & 1 deletion backends/include/Support/ExternC.h
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===------------ Support/ExternC.h - DPPL-SYCL interface ---*--- C ---*---===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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2 changes: 1 addition & 1 deletion backends/include/Support/MemOwnershipAttrs.h
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===----- dppl_mem_ownership_attrs.h - DPPL-SYCL interface --*-- C++ --*--===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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4 changes: 2 additions & 2 deletions backends/include/dppl_data_types.h
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===---------- dppl_data_types.h - DPPL-SYCL interface ----*---- C ---*---===//
//===------------------ dppl_data_types.h - dpctl-C_API ----*---- C ---*---===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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4 changes: 2 additions & 2 deletions backends/include/dppl_opencl_interface.h
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===-- dppl_opencl_interface.h - DPPL-OpenCL interface -------*- C -*-----===//
//===------------ dppl_opencl_interface.h - dpctl-C_API -------*- C -*-----===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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4 changes: 2 additions & 2 deletions backends/include/dppl_sycl_context_interface.h
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===--- dppl_sycl_context_interface.h - DPPL-SYCL interface --*--C++ --*--===//
//===----------- dppl_sycl_context_interface.h - dpctl-C_API --*--C++ --*--===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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4 changes: 2 additions & 2 deletions backends/include/dppl_sycl_device_interface.h
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===--- dppl_sycl_device_interface.h - DPPL-SYCL interface ---*---C++ -*---===//
//===---------- dppl_sycl_device_interface.h - dpctl-C_API ---*---C++ -*---===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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4 changes: 2 additions & 2 deletions backends/include/dppl_sycl_event_interface.h
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===--- dppl_sycl_event_interface.h - DPPL-SYCL interface ---*---C++ -*---===//
//===----------- dppl_sycl_event_interface.h - dpctl-C_API ---*---C++ -*---===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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4 changes: 2 additions & 2 deletions backends/include/dppl_sycl_kernel_interface.h
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===---- dppl_sycl_kernel_interface.h - DPPL-SYCL interface --*--C++ --*--===//
//===------------ dppl_sycl_kernel_interface.h - dpctl-C_API --*--C++ --*--===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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4 changes: 2 additions & 2 deletions backends/include/dppl_sycl_platform_interface.h
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===--- dppl_sycl_platform_interface.h - DPPL-SYCL interface ---*--C++ -*-===//
//===----------- dppl_sycl_platform_interface.h - dpctl-C_API ---*--C++ -*-===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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4 changes: 2 additions & 2 deletions backends/include/dppl_sycl_program_interface.h
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===---- dppl_sycl_program_interface.h - DPPL-SYCL interface --*--C++ --*--===//
//===----------- dppl_sycl_program_interface.h - dpctl-C_API --*--C++ --*--===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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4 changes: 2 additions & 2 deletions backends/include/dppl_sycl_queue_interface.h
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===--- dppl_sycl_queue_interface.h - DPPL-SYCL interface ---*---C++ -*---===//
//===----------- dppl_sycl_queue_interface.h - dpctl-C_API ---*---C++ -*---===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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4 changes: 2 additions & 2 deletions backends/include/dppl_sycl_queue_manager.h
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===--- dppl_sycl_queue_manager.h - DPPL-SYCL interface ---*---C++ ---*---===//
//===----------- dppl_sycl_queue_manager.h - dpctl-C_API ---*---C++ ---*---===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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4 changes: 2 additions & 2 deletions backends/include/dppl_sycl_types.h
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===---------- dppl_sycl_types.h - DPPL-SYCL interface ---*--- C++ ---*---===//
//===-------------- dppl_sycl_types.h - dpctl-C_API ----*---- C++ ----*----===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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4 changes: 2 additions & 2 deletions backends/include/dppl_sycl_usm_interface.h
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===--- dppl_sycl_usm_interface.h - DPPL-SYCL interface ---*---C++ -*---===//
//===------------- dppl_sycl_usm_interface.h - dpctl-C_API ---*---C++ -*---===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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4 changes: 2 additions & 2 deletions backends/include/dppl_utils.h
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===------------- dppl_utils.h - DPPL-SYCL interface --*-- C++ -----*-----===//
//===------------------- dppl_utils.h - dpctl-C_API ---*--- C++ -----*-----===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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4 changes: 2 additions & 2 deletions backends/include/error_check_macros.h
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===----- error_check_macros.h - DPPL-OpenCL interface -------*- C -*-----===//
//===----------- error_check_macros.h - dpctl-C_API-------*- C ------*-----===//
//
// Python Data Parallel Processing Python (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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4 changes: 2 additions & 2 deletions backends/source/dppl_opencl_interface.c
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===------ dppl_opencl_interface.c - DPPL-OpenCL interface ----*- C -*----===//
//===------------ dppl_opencl_interface.c - dpctl-C_API ----*- C -----*----===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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4 changes: 2 additions & 2 deletions backends/source/dppl_sycl_context_interface.cpp
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===--- dppl_sycl_context_interface.cpp - DPPL-SYCL interface --*- C++ -*-===//
//===------- dppl_sycl_context_interface.cpp - dpctl-C_API ---*--- C++ -*-===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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4 changes: 2 additions & 2 deletions backends/source/dppl_sycl_device_interface.cpp
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===--- dppl_sycl_device_interface.cpp - DPPL-SYCL interface --*- C++ -*--===//
//===------ dppl_sycl_device_interface.cpp - dpctl-C_API ---*--- C++ --*--===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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4 changes: 2 additions & 2 deletions backends/source/dppl_sycl_event_interface.cpp
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===--- dppl_sycl_event_interface.cpp - DPPL-SYCL interface --*- C++ -*---===//
//===------ dppl_sycl_event_interface.cpp - dpctl-C_API ---*--- C++ --*---===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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4 changes: 2 additions & 2 deletions backends/source/dppl_sycl_kernel_interface.cpp
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===--- dppl_sycl_kernel_interface.cpp - DPPL-SYCL interface --*-- C++ -*-===//
//===------ dppl_sycl_kernel_interface.cpp - dpctl-C_API ---*--- C++ --*--===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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4 changes: 2 additions & 2 deletions backends/source/dppl_sycl_platform_interface.cpp
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===--- dppl_sycl_platform_interface.cpp - DPPL-SYCL interface --*- C++ -*-===//
//===------ dppl_sycl_platform_interface.cpp - dpctl-C_API --*-- C++ --*--===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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4 changes: 2 additions & 2 deletions backends/source/dppl_sycl_program_interface.cpp
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===--- dppl_sycl_program_interface.cpp - DPPL-SYCL interface --*-- C++ -*-===//
//===----- dppl_sycl_program_interface.cpp - dpctl-C_API ---*--- C++ --*--===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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4 changes: 2 additions & 2 deletions backends/source/dppl_sycl_queue_interface.cpp
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===--- dppl_sycl_queue_interface.cpp - DPPL-SYCL interface --*- C++ -*---===//
//===------ dppl_sycl_queue_interface.cpp - dpctl-C_API ---*--- C++ --*---===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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4 changes: 2 additions & 2 deletions backends/source/dppl_sycl_queue_manager.cpp
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===--- dppl_sycl_queue_manager.cpp - DPPL-SYCL interface --*- C++ -*---===//
//===--------- dppl_sycl_queue_manager.cpp - dpctl-C_API --*-- C++ ---*---===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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4 changes: 2 additions & 2 deletions backends/source/dppl_sycl_usm_interface.cpp
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===--- dppl_sycl_usm_interface.cpp - DPPL-SYCL interface --*- C++ -*---===//
//===------- dppl_sycl_usm_interface.cpp - dpctl-C_API ---*--- C++ ---*---===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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4 changes: 2 additions & 2 deletions backends/source/dppl_utils.cpp
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===--------- dppl_utils.cpp - DPPL-SYCL interface ----*---- C++ ----*----===//
//===-------------- dppl_utils.cpp - dpctl-C_API ----*---- C++ -----*-----===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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8 changes: 4 additions & 4 deletions backends/tests/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -3,9 +3,9 @@ string(COMPARE EQUAL "${GTEST_LIB_DIR}" "" no_gtest_lib_dir)

if(${no_gtest_incl_dir} OR ${no_gtest_lib_dir})
message(WARNING
"GTest is needed to test PyDPPL's backend test cases. Pass in \
"GTest is needed to test dpCtl's C API test cases. Pass in \
-DGTEST_INCLUDE_DIR and -DGTEST_LIB_DIR when you configure Cmake if\
you wish to run PyDPPL backend tests."
you wish to run dpCtl backend tests."
)
else()
# We need thread support for gtest
Expand All @@ -22,7 +22,7 @@ else()

link_directories(${GTEST_LIB_DIR})

set(PYDPPL_BACKEND_TEST_CASES
set(DPCTL_C_API_TEST_CASES
test_sycl_kernel_interface
test_sycl_platform_interface
test_sycl_program_interface
Expand All @@ -38,7 +38,7 @@ else()
file(COPY ${tf} DESTINATION ${CMAKE_CURRENT_BINARY_DIR})
endforeach()

foreach(TEST_CASE ${PYDPPL_BACKEND_TEST_CASES})
foreach(TEST_CASE ${DPCTL_C_API_TEST_CASES})
add_executable(${TEST_CASE} EXCLUDE_FROM_ALL ${TEST_CASE}.cpp)
target_link_libraries(
${TEST_CASE} ${CMAKE_THREAD_LIBS_INIT} gtest DPPLSyclInterface
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4 changes: 2 additions & 2 deletions backends/tests/test_sycl_kernel_interface.cpp
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===---- test_sycl_program_interface.cpp - DPPL-SYCL interface -*- C++ -*-===//
//===-------- test_sycl_program_interface.cpp - dpctl-C_API -*- C++ ---*---===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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4 changes: 2 additions & 2 deletions backends/tests/test_sycl_platform_interface.cpp
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===--- test_sycl_platform_interface.cpp - DPPL-SYCL interface -*- C++ -*-===//
//===------- test_sycl_platform_interface.cpp - dpctl-C_API --*-- C++ --*--===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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4 changes: 2 additions & 2 deletions backends/tests/test_sycl_program_interface.cpp
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===---- test_sycl_program_interface.cpp - DPPL-SYCL interface -*- C++ -*-===//
//===---------- test_sycl_program_interface.cpp - dpctl-C_API --*-- C++ -*-===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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4 changes: 2 additions & 2 deletions backends/tests/test_sycl_queue_interface.cpp
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===---- test_sycl_queue_interface.cpp - DPPL-SYCL interface -*- C++ --*--===//
//===-------- test_sycl_queue_interface.cpp - dpctl-C_API ---*--- C++ --*--===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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4 changes: 2 additions & 2 deletions backends/tests/test_sycl_queue_manager.cpp
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
//===--- test_sycl_queue_manager.cpp - DPPL-SYCL interface --*- C++ ---*---===//
//===------- test_sycl_queue_manager.cpp - dpctl-C_API ---*--- C++ ----*---===//
//
// Python Data Parallel Processing Library (PyDPPL)
// Data Parallel Control Library (dpCtl)
//
// Copyright 2020 Intel Corporation
//
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2 changes: 1 addition & 1 deletion conda-recipe/meta.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -30,7 +30,7 @@ requirements:
- cffi >=1.0.0

about:
home: https://github.com/IntelPython/PyDPPL.git
home: https://github.com/IntelPython/dpCtl.git
license: Apache-2.0
license_file: LICENSE
summary: 'A lightweight Python wrapper for a subset of OpenCL and SYCL API.'
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2 changes: 1 addition & 1 deletion dpctl/__init__.py
Original file line number Diff line number Diff line change
Expand Up @@ -33,7 +33,7 @@

dpCtl's intended usage is as a common SYCL interoperability layer for
different Python libraries and applications. The OpenCL support inside
PyDPPL is slated to be deprecated and then removed in future releases
dpCtl is slated to be deprecated and then removed in future releases
of the library.

Currently, only a small subset of DPC++ runtime objects are exposed
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2 changes: 1 addition & 1 deletion setup.py
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
##===---------- setup.py - dpctl.ocldrv interface -----*- Python -*-----===##
##
## Python Data Parallel Processing Library (PyDPPL)
## Data Parallel Control Library (dpCtl)
##
## Copyright 2020 Intel Corporation
##
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