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Merged
merged 10,000 commits into from
Mar 13, 2015
Merged

Pull request 13/03/2015 #1

merged 10,000 commits into from
Mar 13, 2015

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GameFusion
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majnemer and others added 30 commits March 7, 2015 21:47
@majnemer
Fix the autoconf build
fe1ef27 
lib/ExecutionEngine/Targets has no Makefile, causing the autoconf build
to fail.  Solve this by bringing the COFF implementation of RuntimeDyld
in line like the Mach-O and ELF implementations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231579 91177308-0d34-0410-b5e6-96231b3b80d8
@RKSimon
[DAGCombiner] Add a shuffle mask commutation helper function. NFCI.
b8056be 
We have an increasing number of cases where we are creating commuted shuffle masks - all implementing nearly the same code.

This patch adds a static helper function - ShuffleVectorSDNode::commuteMask() and replaces a number of cases to use it.

Differential Revision: http://reviews.llvm.org/D8139

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231581 91177308-0d34-0410-b5e6-96231b3b80d8
@d0k
Make static variables const if possible. Makes them go into a read-on…
c8a95a8 
…ly section.

Or fold them into a initializer list which has the same effect. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231598 91177308-0d34-0410-b5e6-96231b3b80d8
@adibiagio
[X86][AVX] Fix wrong lowering of VPERM2X128 nodes
692f738 
There were cases where the backend computed a wrong permute mask for a VPERM2X128 node.

Example:
\code
define <8 x float> @foo(<8 x float> %a, <8 x float> %b) {
  %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 undef, i32 undef, i32 6, i32 7, i32 undef, i32 undef, i32 6, i32 7>
  ret <8 x float> %shuffle
}
\code end

Before this patch, llc (with -mattr=+avx) emitted the following vperm2f128:
  vperm2f128 $0, %ymm0, %ymm0, %ymm0  # ymm0 = ymm0[0,1,0,1]

With this patch, llc emits a vperm2f128 with a correct permute mask:
  vperm2f128 $17, %ymm0, %ymm0, %ymm0  # ymm0 = ymm0[2,3,2,3]

Differential Revision: http://reviews.llvm.org/D8119


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231601 91177308-0d34-0410-b5e6-96231b3b80d8
@resistor
Teach DataLayout to infer a plausible alignment for things even when …
c03496d 
…nothing is specified by the user.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231613 91177308-0d34-0410-b5e6-96231b3b80d8
@dwblaikie
Simplify expressions involving boolean constants with clang-tidy
da4471d 
Patch by Richard (legalize at xmission dot com).

Differential Revision: http://reviews.llvm.org/D8154

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231617 91177308-0d34-0410-b5e6-96231b3b80d8
@joker-eph
DCE: isArrayMalloc() is not used neither in LLVM nor Clang
9bfcfff 
From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231624 91177308-0d34-0410-b5e6-96231b3b80d8
@joker-eph
InstCombine: fix fold "fcmp x, undef" to account for NaN
4c8f5af 
Summary:
See the two test cases.

; Can fold fcmp with undef on one side by choosing NaN for the undef

; Can fold fcmp with undef on both side
;   fcmp u_pred undef, undef -> true
;   fcmp o_pred undef, undef -> false
; because whatever you choose for the first undef
; you can choose NaN for the other undef

Reviewers: hfinkel, chandlerc, majnemer

Reviewed By: majnemer

Subscribers: majnemer, llvm-commits

Differential Revision: http://reviews.llvm.org/D7617

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231626 91177308-0d34-0410-b5e6-96231b3b80d8
Run LICM pass after loop unrolling pass.
3836dd0 
Runtime unrollng will introduce a runtime check in loop prologue.
If the unrolled loop is a inner loop, then the proglogue will be inside
the outer loop. LICM pass can help to promote the runtime check out if
the checked value is loop invariant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231630 91177308-0d34-0410-b5e6-96231b3b80d8
Introduce runtime unrolling disable matadata and use it to mark the s…
994b4c7 
…calar loop from vectorization.

Runtime unrolling is an expensive optimization which can bring benefit
only if the loop is hot and iteration number is relatively large enough.
For some loops, we know they are not worth to be runtime unrolled.
The scalar loop from vectorization is one of the cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231631 91177308-0d34-0410-b5e6-96231b3b80d8
[AArch64] Enable partial & runtime unrolling on cortex-a57
40e6627 
For inner one of nested loops, it is more likely to be a hot loop,
and the runtime check can be promoted out from patch 0001, so the
overhead is less, we can try a doubled threshold to unroll more loops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231632 91177308-0d34-0410-b5e6-96231b3b80d8
@resistor
Fix a bug in the LLParser where we failed to diagnose landingpads wit…
8e120d8 
…h non-constant clause operands.

Fixing this also exposed a related issue where the landingpad under construction was not
cleaned up when an error was raised, which would cause bad reference errors before the
error could actually be printed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231634 91177308-0d34-0410-b5e6-96231b3b80d8
Revert r231630 - Run LICM pass after loop unrolling pass.
1428f08 
As it broke llvm bootstrap.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231635 91177308-0d34-0410-b5e6-96231b3b80d8
@adibiagio
Fix line ending in test CodeGen/X86/pr22774.ll. NFC.
d1232fa 
Also, replaced line with 'target triple' with flag -mtriple on the RUN line.
Removed the data layout string as it is not needed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231654 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Fix getNumSGPRsAllowed for VI
d10eb70 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231658 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Limit SGPRs to 80 on Tonga and Iceland
c4ca7b5 
This is a candidate for stable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231659 91177308-0d34-0410-b5e6-96231b3b80d8
@d0k
SymbolRewriter: Hide implementation details
b0c4857 
NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231660 91177308-0d34-0410-b5e6-96231b3b80d8
@d0k
Move unreferenced passes into the cpp file
d3ff0b9 
NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231661 91177308-0d34-0410-b5e6-96231b3b80d8
@tstellarAMD
R600/SI: Fix opcode for ds_read2_b64 and ds_read2st64_b64
cc9a0ba 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231662 91177308-0d34-0410-b5e6-96231b3b80d8
@tstellarAMD
R600/SI: Fix DS definitions and add missing instructions
2ffe261 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231663 91177308-0d34-0410-b5e6-96231b3b80d8
@d0k
Make helper functions static.
0df4e22 
Found by -Wmissing-prototypes. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231664 91177308-0d34-0410-b5e6-96231b3b80d8
Add logical ops to Mips fast-isel
18afdb3 
Summary:
Code is mostly copied from AArch64 port and modified where needed for Mips.

This handles the "non" legal cases of logical ops. Legal cases are handled by tablegen patterns.

Test Plan:
Make check test logopm.ll

All of test-suite passes at O0/O2 and mips32 r1/r2 with this new change.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: echristo, llvm-commits, aemerson, rfuhler

Differential Revision: http://reviews.llvm.org/D6599

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231665 91177308-0d34-0410-b5e6-96231b3b80d8
@espindola
Remove dummy method implementations.
a32448c 
These are pure virtual in the base class, so the compiler checks that they
are implemented.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231673 91177308-0d34-0410-b5e6-96231b3b80d8
@espindola
Don't repeat name in comment. NFC.
ce9ee4e 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231676 91177308-0d34-0410-b5e6-96231b3b80d8
@espindola
Print jump tables before exception tables.
be88669 
In the case where just tables are part of the function section, this produces
more readable assembly by avoiding switching to the eh section and back
to .text.

This would also break with non unique section names, as trying to switch to
a unique section actually creates a new one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231677 91177308-0d34-0410-b5e6-96231b3b80d8
[Hexagon] Adding PackHL nodes and some missing modeling instructions …
1bee90c 
…and patterns

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231678 91177308-0d34-0410-b5e6-96231b3b80d8
@d0k
Drop the hacks used for partial C99 math libraries.
0df66b8 
All supported platforms have half-way decent C99 support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231679 91177308-0d34-0410-b5e6-96231b3b80d8
@EdSchouten
Add support for Nuxi CloudABI.
71706a0 
CloudABI is a POSIX-like runtime environment built around the concept of
capability-based security. More details:

	https://github.com/NuxiNL/cloudlibc

CloudABI uses its own ELFOSABI number. This number has been allocated by
the maintainers of ELF a couple of days ago.

Reviewed by:	echristo


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231681 91177308-0d34-0410-b5e6-96231b3b80d8
@espindola
Delete dead code. NFC.
93ecb89 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231682 91177308-0d34-0410-b5e6-96231b3b80d8
@tstellarAMD
R600/SI: Refactor DS instruction defs
4c5aebe 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231683 91177308-0d34-0410-b5e6-96231b3b80d8
echristo and others added 28 commits March 12, 2015 17:54
@echristo
Remove the need to cache the subtarget in the X86 TargetRegisterInfo
f516a66 
classes. Use a Triple instead and simplify a lot of the querying
logic to use lookups on the Triple.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232071 91177308-0d34-0410-b5e6-96231b3b80d8
@echristo
Fix comment formatting.
63fb193 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232076 91177308-0d34-0410-b5e6-96231b3b80d8
@yrnkrn
Add missing include guards.
217f227 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232078 91177308-0d34-0410-b5e6-96231b3b80d8
@fredriss
[ADT] IntervalMap: use AlignedCharArrayUnion.
a11c930 
Currently IntervalMap would assert when used with keys bigger than host
pointers. This patch uses the AlignedCharArrayUnion functionality to
overcome that limitation.

Differential Revision: http://reviews.llvm.org/D8268

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232079 91177308-0d34-0410-b5e6-96231b3b80d8
@fredriss
Reapply "[dsymutil] Gather function ranges during DIE selection."
63a0e36 
This reverts commit r231967 which reinstates r231957.

Now that IntervalMap uses explicitely aligned storage, it should be safe.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232080 91177308-0d34-0410-b5e6-96231b3b80d8
[X86] Fix a regression introduced by r223641.
be45e0e 
The permps and permd instructions have their operands swapped compared to the
intrinsic definition. Therefore, they do not fall into the INTR_TYPE_2OP
category.

I did not create a new category for those two, as they are the only one AFAICT
in that case.

<rdar://problem/20108262>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232085 91177308-0d34-0410-b5e6-96231b3b80d8
@loganchien
[autoconf] Fix the build failure by quoting the strings.
fed84ed 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232090 91177308-0d34-0410-b5e6-96231b3b80d8
Revert "r232027 - Add infrastructure for support of multiple memory c…
8faeece 
…onstraints"

This (r232027) has caused PR22883; so it seems those bits might be used by
something else after all. Reverting until we can figure out what else to do.

Original commit message:

The operand flag word for ISD::INLINEASM nodes now contains a 15-bit
memory constraint ID when the operand kind is Kind_Mem. This constraint
ID is a numeric equivalent to the constraint code string and is converted
with a target specific hook in TargetLowering.

This patch maps all memory constraints to InlineAsm::Constraint_m so there
is no functional change at this point. It just proves that using these
previously unused bits in the encoding of the flag word doesn't break anything.

The next patch will make each target preserve the current mapping of
everything to Constraint_m for itself while changing the target independent
implementation of the hook to return Constraint_Unknown appropriately. Each
target will then be adapted in separate patches to use appropriate Constraint_*
values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232093 91177308-0d34-0410-b5e6-96231b3b80d8
Unxfail passing test on Hexagon
49fa379 
test/CodeGen/Generic/2008-02-20-MatchingMem.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232098 91177308-0d34-0410-b5e6-96231b3b80d8
@echristo
Remove unused headers.
323b9bb 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232102 91177308-0d34-0410-b5e6-96231b3b80d8
@echristo
Migrate the AArch64 TargetRegisterInfo to its TargetMachine
94a8872 
implementation. This requires a bit of scaffolding and a few fixups
that'll go away once all of the ports have been migrated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232103 91177308-0d34-0410-b5e6-96231b3b80d8
Adding WinEHPrepare tests (currently XFAILs)
d434c0d 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232104 91177308-0d34-0410-b5e6-96231b3b80d8
@tstellarAMD
R600/SI: Remove _e32 and _e64 suffixes from mnemonics
3d712a6 
Instead print them as part of the $dst operand.  The AsmMatcher
requires the 32-bit and 64-bit encodings have the same mnemonic in
order to parse them correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232105 91177308-0d34-0410-b5e6-96231b3b80d8
@tstellarAMD
R600/SI: Don't print scc reg in sopc assembly string
d996c4b 
This is how the proprietary driver prints sopc instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232106 91177308-0d34-0410-b5e6-96231b3b80d8
@RKSimon
Removed useless palignr test - we don't actually provide a llvm.x86.s…
7385caf 
…sse3.palign.r.128 intrinsic

Differential Revision: http://reviews.llvm.org/D8302

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232108 91177308-0d34-0410-b5e6-96231b3b80d8
@echristo
In preparation for moving ARM's TargetRegisterInfo to the TargetMachine
88d7249 
merge Thumb1RegisterInfo and Thumb2RegisterInfo. This will enable
us to match the TargetMachine for our TargetRegisterInfo classes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232117 91177308-0d34-0410-b5e6-96231b3b80d8
@echristo
Move a variable into the assert where it's used - fixes a -Asserts
740aee4 
build warning/error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232119 91177308-0d34-0410-b5e6-96231b3b80d8
@rotateright
[X86, AVX2] Replace inserti128 and extracti128 intrinsics with generi…
cae9695 
…c shuffles

This should complete the job started in r231794 and continued in r232045:
We want to replace as much custom x86 shuffling via intrinsics
as possible because pushing the code down the generic shuffle
optimization path allows for better codegen and less complexity
in LLVM.

AVX2 introduced proper integer variants of the hacked integer insert/extract
C intrinsics that were created for this same functionality with AVX1.

This should complete the removal of insert/extract128 intrinsics.

The Clang precursor patch for this change was checked in at r232109.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232120 91177308-0d34-0410-b5e6-96231b3b80d8
@echristo
Use the cached subtarget off of the machine function.
caedadf 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232128 91177308-0d34-0410-b5e6-96231b3b80d8
@echristo
Use the cached subtarget off of the machine function.
a0485f5 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232129 91177308-0d34-0410-b5e6-96231b3b80d8
@echristo
Add a return after the llvm namespace code for a little extra
4223496 
readability in generated files.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232131 91177308-0d34-0410-b5e6-96231b3b80d8
@echristo
Use the variable names from the TargetInstrInfo source when we
c666f5d 
reference them in the generated files. A few characters aren't huge
here and CFSetupOpcode is much more readable than S0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232132 91177308-0d34-0410-b5e6-96231b3b80d8
@nlewycky
When forming an addrec out of a phi don't just look at the last compu…
011cb4d 
…tation and steal its flags for our own, there may be other computations in the middle. Check whether the LHS of the computation is the phi itself and then we know it's safe to steal the flags. Fixes PR22795.

There's a missed optimization opportunity where we could look at the full chain of computation and take the intersection of the flags instead of only looking one instruction deep.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232134 91177308-0d34-0410-b5e6-96231b3b80d8
Updating GettingStarted documentation to reference CMake as the prefe…
1bba751 
…rred way to build LLVM.

Reviewers: chandlerc, samsonov, echristo

Reviewed By: samsonov

Subscribers: emaste, joker.eph, llvm-commits

Differential Revision: http://reviews.llvm.org/D8046

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232135 91177308-0d34-0410-b5e6-96231b3b80d8
@zygoloid
Fix build break in this code. Nothing uses this header, but the modules
e85ccd4 
buildbot builds it anyway and was angry because of this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232139 91177308-0d34-0410-b5e6-96231b3b80d8
[MachineCopyPropagation] Fix a bug causing incorrect removal for the …
fcc897c 
…instruction sequences as follows

   %Q5_Q6<def> = COPY %Q2_Q3
   %D5<def> =
   %D3<def> =
   %D3<def> = COPY %D6     // Incorrectly removed in MachineCopyPropagation
   Using of %D3 results in incorrect result ...

   Reviewed in http://reviews.llvm.org/D8242 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232142 91177308-0d34-0410-b5e6-96231b3b80d8
@resistor
Fix an infinite recursion in the verifier caused by calling isSized o…
39fcd23 
…n a recursive type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232143 91177308-0d34-0410-b5e6-96231b3b80d8
@resistor
Teach TBAA analysis to report errors on cyclic TBAA metadata rather t…
c20535d 
…han hanging.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232144 91177308-0d34-0410-b5e6-96231b3b80d8
GameFusion added a commit that referenced this pull request Mar 13, 2015
@GameFusion
Merge pull request #1 from llvm-mirror/master
8cae801 
Pull request 13/03/2015
@GameFusion GameFusion merged commit 8cae801 into GameFusion:master Mar 13, 2015
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