- 👋 Hi, I’m @FilipGembec-dev
- 👀 I’m interested in FPGA development and adaptive computing.
- 📫 How to reach me - https://www.linkedin.com/in/filip-gembec-1a956a223/
🦎
Coding
I design embedded FPGA solutions by utilising Verilog HDL and interfacing them using custom C++ CLI apps.
Popular repositories Loading
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UART_and_phraser_test
UART_and_phraser_test PublicAn example of phrasing incoming bytes from an UART
Verilog 1
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FPGA-soft-processor
FPGA-soft-processor PublicA soft processor designed for use with a Digilent Arty A7 100t FPGA dev board coded in Verilog
HTML
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FPGA-computer-vision
FPGA-computer-vision PublicA simple project demonstrating simple neural network principles implemented in a FPGA enviroment.
HTML
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explicit_hdl_modeling_processor
explicit_hdl_modeling_processor PublicThis project displays designing a processor uusing explicit verilog expressions in the state machine.
Verilog
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