RM 6641: Temporary implementation of dma_alloc_coherent() on STM32H7 SOM

[av-dyachenko]

Design

Temporary implementation of dma_alloc_coherent() on STM32H7 SOM. We just create a static const array in hope that it will be placed in the text section and will be below the 4MB boundary in SDRAM, which is configured as uncached memory in U-Boot. This hack is needed to start using Ethernet as soon as possible. The proper implementation is coming soon.

Test

Configure the eth0 interface and ping the TFTP server:

/ # ifconfig eth0 192.168.0.166
[   31.905726] stm32-dwmac 40028000.ethernet eth0: PHY [stmmac-0:01] driver [SMSC LAN8710/LAN8720] (irq=POLL)
[   31.917970] stm32-dwmac 40028000.ethernet eth0: Register MEM_TYPE_PAGE_POOL RxQ-0
[   31.978994] stm32-dwmac 40028000.ethernet eth0: No Safety Features support found
[   31.988001] stm32-dwmac 40028000.ethernet eth0: IEEE 1588-2008 Advanced Timestamp supported
[   32.000476] stm32-dwmac 40028000.ethernet eth0: registered PTP clock
[   32.018187] stm32-dwmac 40028000.ethernet eth0: configuring for phy/rmii link mode
/ # [   34.132361] stm32-dwmac 40028000.ethernet eth0: Link is Up - 100Mbps/Full - flow control rx/tx
[   34.140412] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready

/ # ping 192.168.0.1
PING 192.168.0.1 (192.168.0.1): 56 data bytes
64 bytes from 192.168.0.1: seq=0 ttl=64 time=3.936 ms
64 bytes from 192.168.0.1: seq=1 ttl=64 time=1.896 ms
64 bytes from 192.168.0.1: seq=2 ttl=64 time=1.937 ms
^C
--- 192.168.0.1 ping statistics ---
3 packets transmitted, 3 packets received, 0% packet loss
round-trip min/avg/max = 1.896/2.589/3.936 ms
/ #