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flashchips.c: enable WP for to 7 entries of MX chips
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These weren't split:
 * MX25L3206E/MX25L3208E
 * MX25L6405
 * MX25L6405D
 * MX25L6406E/MX25L6408E

MX25L6436E/MX25L6445E/MX25L6465E/MX25L6473E/MX25L6473F was split into:
 * MX25L6436E/MX25L6445E/MX25L6465E
   - security register
   - WPS
 * MX25L6473E
   - security register
   - OTP TB bit in CONFIG1/STATUS2 (0x15 opcode)
   - WPS
 * MX25L6473F
   - NO security register
   - OTP TB bit in CONFIG1/STATUS2 (0x15 opcode)
   - NO WPS

Change-Id: Ib3db9d39ffacd3e9e44de92c6cfb6c3ecc8615bd
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
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@SergiiDmytruk
SergiiDmytruk committed Aug 17, 2022
1 parent 14012f4 commit 9c3ba8d
Showing 1 changed file with 131 additions and 2 deletions.
133 changes: 131 additions & 2 deletions flashchips.c
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Original file line number Diff line number Diff line change
Expand Up @@ -8945,6 +8945,13 @@ const struct flashchip flashchips[] = {
.write = spi_chip_write_256,
.read = spi_chip_read, /* Fast read (0x0B) and dual I/O supported */
.voltage = {2700, 3600},
.reg_bits =
{
.srp = {STATUS1, 7, RW},
.bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}},
.cmp = {STATUS1, 5, RW}, /* Called BP3 in datasheet, acts like CMP */
},
.decode_range = decode_range_spi25_bit_cmp,
},

{
Expand Down Expand Up @@ -9171,6 +9178,12 @@ const struct flashchip flashchips[] = {
.write = spi_chip_write_256,
.read = spi_chip_read, /* Fast read (0x0B) supported */
.voltage = {2700, 3600},
.reg_bits =
{
.srp = {STATUS1, 7, RW},
.bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}},
},
.decode_range = decode_range_spi25,
},

{
Expand Down Expand Up @@ -9207,6 +9220,13 @@ const struct flashchip flashchips[] = {
.write = spi_chip_write_256,
.read = spi_chip_read, /* Fast read (0x0B), dual I/O read (0xBB) supported */
.voltage = {2700, 3600},
.reg_bits =
{
.srp = {STATUS1, 7, RW},
.bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}},
.cmp = {STATUS1, 5, RW}, /* Called BP3 in datasheet, acts like CMP */
},
.decode_range = decode_range_spi25_bit_cmp,
},

{
Expand Down Expand Up @@ -9247,19 +9267,26 @@ const struct flashchip flashchips[] = {
.write = spi_chip_write_256,
.read = spi_chip_read, /* Fast read (0x0B), dual I/O read supported */
.voltage = {2700, 3600},
.reg_bits =
{
.srp = {STATUS1, 7, RW},
.bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}},
.cmp = {STATUS1, 5, RW}, /* Called BP3 in datasheet, acts like CMP */
},
.decode_range = decode_range_spi25_bit_cmp,
},

{
.vendor = "Macronix",
.name = "MX25L6436E/MX25L6445E/MX25L6465E/MX25L6473E/MX25L6473F",
.name = "MX25L6436E/MX25L6445E/MX25L6465E",
.bustype = BUS_SPI,
.manufacture_id = MACRONIX_ID,
.model_id = MACRONIX_MX25L6405,
.total_size = 8192,
.page_size = 256,
/* supports SFDP */
/* OTP: 512B total; enter 0xB1, exit 0xC1 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_SCUR,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
Expand Down Expand Up @@ -9287,6 +9314,108 @@ const struct flashchip flashchips[] = {
.write = spi_chip_write_256,
.read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
.voltage = {2700, 3600},
.reg_bits =
{
.srp = {STATUS1, 7, RW},
.bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}},
.wps = {SECURITY, 7, OTP}, /* This bit is set by WPSEL command */
},
.decode_range = decode_range_spi25_2x_block,
},

{
.vendor = "Macronix",
.name = "MX25L6473E",
.bustype = BUS_SPI,
.manufacture_id = MACRONIX_ID,
.model_id = MACRONIX_MX25L6405,
.total_size = 8192,
.page_size = 256,
/* supports SFDP */
/* OTP: 512B total; enter 0xB1, exit 0xC1 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_WRSR_EXT2 | FEATURE_SCUR | FEATURE_RDSR2_0x15,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
{
{
.eraseblocks = { {4 * 1024, 2048} },
.block_erase = spi_block_erase_20,
}, {
.eraseblocks = { {32 * 1024, 256} },
.block_erase = spi_block_erase_52,
}, {
.eraseblocks = { {64 * 1024, 128} },
.block_erase = spi_block_erase_d8,
}, {
.eraseblocks = { {8 * 1024 * 1024, 1} },
.block_erase = spi_block_erase_60,
}, {
.eraseblocks = { {8 * 1024 * 1024, 1} },
.block_erase = spi_block_erase_c7,
}
},
.printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */
.unlock = spi_disable_blockprotect_bp3_srwd,
.write = spi_chip_write_256,
.read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
.voltage = {2700, 3600},
.reg_bits =
{
.srp = {STATUS1, 7, RW},
.bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}},
.tb = {CONFIG1, 3, OTP},
.wps = {SECURITY, 7, OTP}, /* This bit is set by WPSEL command */
},
.decode_range = decode_range_spi25,
},

{
.vendor = "Macronix",
.name = "MX25L6473F",
.bustype = BUS_SPI,
.manufacture_id = MACRONIX_ID,
.model_id = MACRONIX_MX25L6405,
.total_size = 8192,
.page_size = 256,
/* supports SFDP */
/* OTP: 512B total; enter 0xB1, exit 0xC1 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_WRSR_EXT2 | FEATURE_RDSR2_0x15,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
{
{
.eraseblocks = { {4 * 1024, 2048} },
.block_erase = spi_block_erase_20,
}, {
.eraseblocks = { {32 * 1024, 256} },
.block_erase = spi_block_erase_52,
}, {
.eraseblocks = { {64 * 1024, 128} },
.block_erase = spi_block_erase_d8,
}, {
.eraseblocks = { {8 * 1024 * 1024, 1} },
.block_erase = spi_block_erase_60,
}, {
.eraseblocks = { {8 * 1024 * 1024, 1} },
.block_erase = spi_block_erase_c7,
}
},
.printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */
.unlock = spi_disable_blockprotect_bp3_srwd,
.write = spi_chip_write_256,
.read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
.voltage = {2700, 3600},
.reg_bits =
{
.srp = {STATUS1, 7, RW},
.bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}},
.tb = {CONFIG1, 3, OTP},
},
.decode_range = decode_range_spi25,
},

{
Expand Down

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