This is the DASICS Bus Checker (DBChecker) developed by Gwins7.
use make to generate verilog file.
Referred Repo:
forked from OSCPU/chisel-playground
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DASICS-ICT/dbchecker
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- Scala 45.2%
- SystemVerilog 25.0%
- Tcl 22.3%
- Verilog 7.0%
- Makefile 0.5%