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[ARM] pxa: make pxa2xx_spi driver use ssp_request()/ssp_free()
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1. make pxa2xx_spi.c use ssp_request() and ssp_free() to get the common
   information of the designated SSP port.

2. remove those IRQ/memory request code, ssp_request() has done that for
   the driver

3. the SPI platform device is thus made psuedo, no resource (memory/IRQ)
   has to be defined, all will be retreived by ssp_request()

4. introduce ssp_get_clk_div() to handle controller difference in clock
   divisor setting

5. use clk_xxx() API for clock enable/disable, and clk_get_rate() to
   handle the different SSP clock frequency between different processors

Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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eric miao authored and Russell King committed Jan 26, 2008
1 parent 3dcb00e commit 2f1a74e
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Showing 4 changed files with 53 additions and 127 deletions.
17 changes: 0 additions & 17 deletions arch/arm/mach-pxa/lubbock.c
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Original file line number Diff line number Diff line change
Expand Up @@ -206,30 +206,13 @@ static struct resource smc91x_resources[] = {
* (to J5) and poking board registers (as done below). Else it's only useful
* for the temperature sensors.
*/
static struct resource pxa_ssp_resources[] = {
[0] = {
.start = __PREG(SSCR0_P(1)),
.end = __PREG(SSCR0_P(1)) + 0x14,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_SSP,
.end = IRQ_SSP,
.flags = IORESOURCE_IRQ,
},
};

static struct pxa2xx_spi_master pxa_ssp_master_info = {
.ssp_type = PXA25x_SSP,
.clock_enable = CKEN_SSP,
.num_chipselect = 0,
};

static struct platform_device pxa_ssp = {
.name = "pxa2xx-spi",
.id = 1,
.resource = pxa_ssp_resources,
.num_resources = ARRAY_SIZE(pxa_ssp_resources),
.dev = {
.platform_data = &pxa_ssp_master_info,
},
Expand Down
1 change: 1 addition & 0 deletions drivers/spi/Kconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -153,6 +153,7 @@ config SPI_OMAP24XX
config SPI_PXA2XX
tristate "PXA2xx SSP SPI master"
depends on SPI_MASTER && ARCH_PXA && EXPERIMENTAL
select PXA_SSP
help
This enables using a PXA2xx SSP port as a SPI master controller.
The driver can be configured to use any SSP port and additional
Expand Down
138 changes: 52 additions & 86 deletions drivers/spi/pxa2xx_spi.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -27,6 +27,7 @@
#include <linux/spi/spi.h>
#include <linux/workqueue.h>
#include <linux/delay.h>
#include <linux/clk.h>

#include <asm/io.h>
#include <asm/irq.h>
Expand All @@ -37,6 +38,7 @@
#include <asm/arch/hardware.h>
#include <asm/arch/pxa-regs.h>
#include <asm/arch/regs-ssp.h>
#include <asm/arch/ssp.h>
#include <asm/arch/pxa2xx_spi.h>

MODULE_AUTHOR("Stephen Street");
Expand Down Expand Up @@ -81,6 +83,9 @@ struct driver_data {
/* Driver model hookup */
struct platform_device *pdev;

/* SSP Info */
struct ssp_device *ssp;

/* SPI framework hookup */
enum pxa_ssp_type ssp_type;
struct spi_master *master;
Expand Down Expand Up @@ -779,13 +784,24 @@ int set_dma_burst_and_threshold(struct chip_data *chip, struct spi_device *spi,
return retval;
}

static unsigned int ssp_get_clk_div(struct ssp_device *ssp, int rate)
{
unsigned long ssp_clk = clk_get_rate(ssp->clk);

if (ssp->type == PXA25x_SSP)
return ((ssp_clk / (2 * rate) - 1) & 0xff) << 8;
else
return ((ssp_clk / rate - 1) & 0xfff) << 8;
}

static void pump_transfers(unsigned long data)
{
struct driver_data *drv_data = (struct driver_data *)data;
struct spi_message *message = NULL;
struct spi_transfer *transfer = NULL;
struct spi_transfer *previous = NULL;
struct chip_data *chip = NULL;
struct ssp_device *ssp = drv_data->ssp;
void *reg = drv_data->ioaddr;
u32 clk_div = 0;
u8 bits = 0;
Expand Down Expand Up @@ -867,12 +883,7 @@ static void pump_transfers(unsigned long data)
if (transfer->bits_per_word)
bits = transfer->bits_per_word;

if (reg == SSP1_VIRT)
clk_div = SSP1_SerClkDiv(speed);
else if (reg == SSP2_VIRT)
clk_div = SSP2_SerClkDiv(speed);
else if (reg == SSP3_VIRT)
clk_div = SSP3_SerClkDiv(speed);
clk_div = ssp_get_clk_div(ssp, speed);

if (bits <= 8) {
drv_data->n_bytes = 1;
Expand Down Expand Up @@ -1075,6 +1086,7 @@ static int setup(struct spi_device *spi)
struct pxa2xx_spi_chip *chip_info = NULL;
struct chip_data *chip;
struct driver_data *drv_data = spi_master_get_devdata(spi->master);
struct ssp_device *ssp = drv_data->ssp;
unsigned int clk_div;

if (!spi->bits_per_word)
Expand Down Expand Up @@ -1158,18 +1170,7 @@ static int setup(struct spi_device *spi)
}
}

if (drv_data->ioaddr == SSP1_VIRT)
clk_div = SSP1_SerClkDiv(spi->max_speed_hz);
else if (drv_data->ioaddr == SSP2_VIRT)
clk_div = SSP2_SerClkDiv(spi->max_speed_hz);
else if (drv_data->ioaddr == SSP3_VIRT)
clk_div = SSP3_SerClkDiv(spi->max_speed_hz);
else
{
dev_err(&spi->dev, "failed setup: unknown IO address=0x%p\n",
drv_data->ioaddr);
return -ENODEV;
}
clk_div = ssp_get_clk_div(ssp, spi->max_speed_hz);
chip->speed_hz = spi->max_speed_hz;

chip->cr0 = clk_div
Expand All @@ -1184,15 +1185,15 @@ static int setup(struct spi_device *spi)

/* NOTE: PXA25x_SSP _could_ use external clocking ... */
if (drv_data->ssp_type != PXA25x_SSP)
dev_dbg(&spi->dev, "%d bits/word, %d Hz, mode %d\n",
dev_dbg(&spi->dev, "%d bits/word, %ld Hz, mode %d\n",
spi->bits_per_word,
(CLOCK_SPEED_HZ)
clk_get_rate(ssp->clk)
/ (1 + ((chip->cr0 & SSCR0_SCR) >> 8)),
spi->mode & 0x3);
else
dev_dbg(&spi->dev, "%d bits/word, %d Hz, mode %d\n",
dev_dbg(&spi->dev, "%d bits/word, %ld Hz, mode %d\n",
spi->bits_per_word,
(CLOCK_SPEED_HZ/2)
clk_get_rate(ssp->clk)
/ (1 + ((chip->cr0 & SSCR0_SCR) >> 8)),
spi->mode & 0x3);

Expand Down Expand Up @@ -1324,49 +1325,43 @@ static int __init pxa2xx_spi_probe(struct platform_device *pdev)
struct pxa2xx_spi_master *platform_info;
struct spi_master *master;
struct driver_data *drv_data = 0;
struct resource *memory_resource;
int irq;
struct ssp_device *ssp;
int status = 0;

platform_info = dev->platform_data;

if (platform_info->ssp_type == SSP_UNDEFINED) {
dev_err(&pdev->dev, "undefined SSP\n");
ssp = ssp_request(pdev->id, pdev->name);
if (ssp == NULL) {
dev_err(&pdev->dev, "failed to request SSP%d\n", pdev->id);
return -ENODEV;
}

/* Allocate master with space for drv_data and null dma buffer */
master = spi_alloc_master(dev, sizeof(struct driver_data) + 16);
if (!master) {
dev_err(&pdev->dev, "can not alloc spi_master\n");
ssp_free(ssp);
return -ENOMEM;
}
drv_data = spi_master_get_devdata(master);
drv_data->master = master;
drv_data->master_info = platform_info;
drv_data->pdev = pdev;
drv_data->ssp = ssp;

master->bus_num = pdev->id;
master->num_chipselect = platform_info->num_chipselect;
master->cleanup = cleanup;
master->setup = setup;
master->transfer = transfer;

drv_data->ssp_type = platform_info->ssp_type;
drv_data->ssp_type = ssp->type;
drv_data->null_dma_buf = (u32 *)ALIGN((u32)(drv_data +
sizeof(struct driver_data)), 8);

/* Setup register addresses */
memory_resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!memory_resource) {
dev_err(&pdev->dev, "memory resources not defined\n");
status = -ENODEV;
goto out_error_master_alloc;
}

drv_data->ioaddr = (void *)io_p2v((unsigned long)(memory_resource->start));
drv_data->ssdr_physical = memory_resource->start + 0x00000010;
if (platform_info->ssp_type == PXA25x_SSP) {
drv_data->ioaddr = ssp->mmio_base;
drv_data->ssdr_physical = ssp->phys_base + SSDR;
if (ssp->type == PXA25x_SSP) {
drv_data->int_cr1 = SSCR1_TIE | SSCR1_RIE;
drv_data->dma_cr1 = 0;
drv_data->clear_sr = SSSR_ROR;
Expand All @@ -1378,15 +1373,7 @@ static int __init pxa2xx_spi_probe(struct platform_device *pdev)
drv_data->mask_sr = SSSR_TINT | SSSR_RFS | SSSR_TFS | SSSR_ROR;
}

/* Attach to IRQ */
irq = platform_get_irq(pdev, 0);
if (irq < 0) {
dev_err(&pdev->dev, "irq resource not defined\n");
status = -ENODEV;
goto out_error_master_alloc;
}

status = request_irq(irq, ssp_int, 0, dev->bus_id, drv_data);
status = request_irq(ssp->irq, ssp_int, 0, dev->bus_id, drv_data);
if (status < 0) {
dev_err(&pdev->dev, "can not get IRQ\n");
goto out_error_master_alloc;
Expand Down Expand Up @@ -1419,29 +1406,12 @@ static int __init pxa2xx_spi_probe(struct platform_device *pdev)
goto out_error_dma_alloc;
}

if (drv_data->ioaddr == SSP1_VIRT) {
DRCMRRXSSDR = DRCMR_MAPVLD
| drv_data->rx_channel;
DRCMRTXSSDR = DRCMR_MAPVLD
| drv_data->tx_channel;
} else if (drv_data->ioaddr == SSP2_VIRT) {
DRCMRRXSS2DR = DRCMR_MAPVLD
| drv_data->rx_channel;
DRCMRTXSS2DR = DRCMR_MAPVLD
| drv_data->tx_channel;
} else if (drv_data->ioaddr == SSP3_VIRT) {
DRCMRRXSS3DR = DRCMR_MAPVLD
| drv_data->rx_channel;
DRCMRTXSS3DR = DRCMR_MAPVLD
| drv_data->tx_channel;
} else {
dev_err(dev, "bad SSP type\n");
goto out_error_dma_alloc;
}
DRCMR(ssp->drcmr_rx) = DRCMR_MAPVLD | drv_data->rx_channel;
DRCMR(ssp->drcmr_tx) = DRCMR_MAPVLD | drv_data->tx_channel;
}

/* Enable SOC clock */
pxa_set_cken(platform_info->clock_enable, 1);
clk_enable(ssp->clk);

/* Load default SSP configuration */
write_SSCR0(0, drv_data->ioaddr);
Expand Down Expand Up @@ -1480,7 +1450,7 @@ static int __init pxa2xx_spi_probe(struct platform_device *pdev)
destroy_queue(drv_data);

out_error_clock_enabled:
pxa_set_cken(platform_info->clock_enable, 0);
clk_disable(ssp->clk);

out_error_dma_alloc:
if (drv_data->tx_channel != -1)
Expand All @@ -1489,17 +1459,18 @@ static int __init pxa2xx_spi_probe(struct platform_device *pdev)
pxa_free_dma(drv_data->rx_channel);

out_error_irq_alloc:
free_irq(irq, drv_data);
free_irq(ssp->irq, drv_data);

out_error_master_alloc:
spi_master_put(master);
ssp_free(ssp);
return status;
}

static int pxa2xx_spi_remove(struct platform_device *pdev)
{
struct driver_data *drv_data = platform_get_drvdata(pdev);
int irq;
struct ssp_device *ssp = drv_data->ssp;
int status = 0;

if (!drv_data)
Expand All @@ -1521,28 +1492,21 @@ static int pxa2xx_spi_remove(struct platform_device *pdev)

/* Disable the SSP at the peripheral and SOC level */
write_SSCR0(0, drv_data->ioaddr);
pxa_set_cken(drv_data->master_info->clock_enable, 0);
clk_disable(ssp->clk);

/* Release DMA */
if (drv_data->master_info->enable_dma) {
if (drv_data->ioaddr == SSP1_VIRT) {
DRCMRRXSSDR = 0;
DRCMRTXSSDR = 0;
} else if (drv_data->ioaddr == SSP2_VIRT) {
DRCMRRXSS2DR = 0;
DRCMRTXSS2DR = 0;
} else if (drv_data->ioaddr == SSP3_VIRT) {
DRCMRRXSS3DR = 0;
DRCMRTXSS3DR = 0;
}
DRCMR(ssp->drcmr_rx) = 0;
DRCMR(ssp->drcmr_tx) = 0;
pxa_free_dma(drv_data->tx_channel);
pxa_free_dma(drv_data->rx_channel);
}

/* Release IRQ */
irq = platform_get_irq(pdev, 0);
if (irq >= 0)
free_irq(irq, drv_data);
free_irq(ssp->irq, drv_data);

/* Release SSP */
ssp_free(ssp);

/* Disconnect from the SPI framework */
spi_unregister_master(drv_data->master);
Expand Down Expand Up @@ -1577,6 +1541,7 @@ static int suspend_devices(struct device *dev, void *pm_message)
static int pxa2xx_spi_suspend(struct platform_device *pdev, pm_message_t state)
{
struct driver_data *drv_data = platform_get_drvdata(pdev);
struct ssp_device *ssp = drv_data->ssp;
int status = 0;

/* Check all childern for current power state */
Expand All @@ -1589,18 +1554,19 @@ static int pxa2xx_spi_suspend(struct platform_device *pdev, pm_message_t state)
if (status != 0)
return status;
write_SSCR0(0, drv_data->ioaddr);
pxa_set_cken(drv_data->master_info->clock_enable, 0);
clk_disable(ssp->clk);

return 0;
}

static int pxa2xx_spi_resume(struct platform_device *pdev)
{
struct driver_data *drv_data = platform_get_drvdata(pdev);
struct ssp_device *ssp = drv_data->ssp;
int status = 0;

/* Enable the SSP clock */
pxa_set_cken(drv_data->master_info->clock_enable, 1);
clk_disable(ssp->clk);

/* Start the queue running */
status = start_queue(drv_data);
Expand Down
24 changes: 0 additions & 24 deletions include/asm-arm/arch-pxa/pxa2xx_spi.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -22,32 +22,8 @@
#define PXA2XX_CS_ASSERT (0x01)
#define PXA2XX_CS_DEASSERT (0x02)

#if defined(CONFIG_PXA25x)
#define CLOCK_SPEED_HZ 3686400
#define SSP1_SerClkDiv(x) (((CLOCK_SPEED_HZ/2/(x+1))<<8)&0x0000ff00)
#define SSP2_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
#define SSP3_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
#elif defined(CONFIG_PXA27x)
#define CLOCK_SPEED_HZ 13000000
#define SSP1_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
#define SSP2_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
#define SSP3_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
#endif

#define SSP1_VIRT ((void *)(io_p2v(__PREG(SSCR0_P(1)))))
#define SSP2_VIRT ((void *)(io_p2v(__PREG(SSCR0_P(2)))))
#define SSP3_VIRT ((void *)(io_p2v(__PREG(SSCR0_P(3)))))

enum pxa_ssp_type {
SSP_UNDEFINED = 0,
PXA25x_SSP, /* pxa 210, 250, 255, 26x */
PXA25x_NSSP, /* pxa 255, 26x (including ASSP) */
PXA27x_SSP,
};

/* device.platform_data for SSP controller devices */
struct pxa2xx_spi_master {
enum pxa_ssp_type ssp_type;
u32 clock_enable;
u16 num_chipselect;
u8 enable_dma;
Expand Down

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