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Moving the Hybrid CPUs API out of preview (uxlfoundation#680)
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Move the Hybrid CPUs API out of preview. This patch removes the necessity of setting the preview macro and removes the API reference topic

Signed-off-by: Kochin Ivan <kochin.ivan@intel.com>
Co-authored-by: Kochin Ivan <kochin.ivan@intel.com>
Co-authored-by: Isaev, Ilya <ilya.isaev@intel.com>
Co-authored-by: Alexandra <alexandra.epanchinzeva@intel.com>
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4 people authored Dec 20, 2022
1 parent 66c6d8e commit 2ecfcf5
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Showing 12 changed files with 22 additions and 251 deletions.
118 changes: 0 additions & 118 deletions doc/main/reference/constraints_extensions.rst

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71 changes: 0 additions & 71 deletions doc/main/reference/info_namespace_extensions.rst

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2 changes: 0 additions & 2 deletions doc/main/reference/reference.rst
Original file line number Diff line number Diff line change
Expand Up @@ -47,7 +47,5 @@ The key properties of a preview feature are:
scalable_memory_pools
helpers_for_expressing_graphs
concurrent_lru_cache_cls
constraints_extensions
info_namespace_extensions
task_group_extensions
custom_mutex_chmap
5 changes: 3 additions & 2 deletions doc/main/tbb_userguide/Guiding_Task_Scheduler_Execution.rst
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Expand Up @@ -61,8 +61,9 @@ assign a NUMA node identifier to the ``task_arena::constraints::numa_id`` field.

The processors with `Intel® Hybrid Technology <https://www.intel.com/content/www/us/en/products/docs/processors/core/core-processors-with-hybrid-technology-brief.html>`_
contain several core types, each is suited for different purposes.
For example, some applications may improve their performance by preferring execution on the most performant cores.
To set execution preference, assign specific core type identifier to the ``task_arena::constraints::core_type`` field.
In most cases, systems with hybrid CPU architecture show reasonable performance without involving additional API calls.
However, in some exceptional scenarios, performance may be tuned by setting the preferred core type.
To set the preferred core type for the execution, assign a specific core type identifier to the ``task_arena::constraints::core_type`` field.

The example shows how to set the most performant core type as preferable for work execution:

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4 changes: 0 additions & 4 deletions doc/main/tbb_userguide/snippets/flow_graph_examples.cpp
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Expand Up @@ -17,10 +17,6 @@
/* Flow Graph Code Example for the Userguide.
*/

//! Enable extended task_arena constraints feature for supporting Intel Hybrid Technology
//! and Intel Hyper-Threading Technology.
#define TBB_PREVIEW_TASK_ARENA_CONSTRAINTS_EXTENSION 1

#include <oneapi/tbb/flow_graph.h>
#include <vector>

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4 changes: 0 additions & 4 deletions include/oneapi/tbb/detail/_config.h
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Expand Up @@ -374,10 +374,6 @@
#define __TBB_ARENA_BINDING 1
#endif

#if (TBB_PREVIEW_TASK_ARENA_CONSTRAINTS_EXTENSION || __TBB_BUILD) && __TBB_ARENA_BINDING
#define __TBB_PREVIEW_TASK_ARENA_CONSTRAINTS_EXTENSION_PRESENT 1
#endif

#ifndef __TBB_ENQUEUE_ENFORCED_CONCURRENCY
#define __TBB_ENQUEUE_ENFORCED_CONCURRENCY 1
#endif
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12 changes: 1 addition & 11 deletions include/oneapi/tbb/info.h
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@@ -1,5 +1,5 @@
/*
Copyright (c) 2019-2021 Intel Corporation
Copyright (c) 2019-2022 Intel Corporation
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
Expand Down Expand Up @@ -49,7 +49,6 @@ struct constraints {
max_concurrency = maximal_concurrency;
return *this;
}
#if __TBB_PREVIEW_TASK_ARENA_CONSTRAINTS_EXTENSION_PRESENT
constraints& set_core_type(core_type_id id) {
core_type = id;
return *this;
Expand All @@ -58,14 +57,11 @@ struct constraints {
max_threads_per_core = threads_number;
return *this;
}
#endif

numa_node_id numa_id = -1;
int max_concurrency = -1;
#if __TBB_PREVIEW_TASK_ARENA_CONSTRAINTS_EXTENSION_PRESENT
core_type_id core_type = -1;
int max_threads_per_core = -1;
#endif
};

} // namespace d1
Expand Down Expand Up @@ -96,7 +92,6 @@ inline int default_concurrency(numa_node_id id = -1) {
return r1::numa_default_concurrency(id);
}

#if __TBB_PREVIEW_TASK_ARENA_CONSTRAINTS_EXTENSION_PRESENT
inline std::vector<core_type_id> core_types() {
std::vector<int> core_type_indexes(r1::core_type_count());
r1::fill_core_type_indices(core_type_indexes.data());
Expand All @@ -107,22 +102,17 @@ inline int default_concurrency(constraints c) {
if (c.max_concurrency > 0) { return c.max_concurrency; }
return r1::constraints_default_concurrency(c);
}
#endif /*__TBB_PREVIEW_TASK_ARENA_CONSTRAINTS_EXTENSION_PRESENT*/

} // namespace d1
} // namespace detail

inline namespace v1 {
using detail::d1::numa_node_id;
#if __TBB_PREVIEW_TASK_ARENA_CONSTRAINTS_EXTENSION_PRESENT
using detail::d1::core_type_id;
#endif

namespace info {
using detail::d1::numa_nodes;
#if __TBB_PREVIEW_TASK_ARENA_CONSTRAINTS_EXTENSION_PRESENT
using detail::d1::core_types;
#endif

using detail::d1::default_concurrency;
} // namespace info
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9 changes: 0 additions & 9 deletions include/oneapi/tbb/task_arena.h
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Expand Up @@ -187,13 +187,8 @@ class task_arena_base {
, my_num_reserved_slots(reserved_for_masters)
, my_priority(a_priority)
, my_numa_id(constraints_.numa_id)
#if __TBB_PREVIEW_TASK_ARENA_CONSTRAINTS_EXTENSION_PRESENT
, my_core_type(constraints_.core_type)
, my_max_threads_per_core(constraints_.max_threads_per_core)
#else
, my_core_type(automatic)
, my_max_threads_per_core(automatic)
#endif
{}
#endif /*__TBB_ARENA_BINDING*/
public:
Expand Down Expand Up @@ -280,10 +275,8 @@ class task_arena : public task_arena_base {
constraints{}
.set_numa_id(s.my_numa_id)
.set_max_concurrency(s.my_max_concurrency)
#if __TBB_PREVIEW_TASK_ARENA_CONSTRAINTS_EXTENSION_PRESENT
.set_core_type(s.my_core_type)
.set_max_threads_per_core(s.my_max_threads_per_core)
#endif
, s.my_num_reserved_slots, s.my_priority)
{}
#else
Expand Down Expand Up @@ -337,10 +330,8 @@ class task_arena : public task_arena_base {
if( !is_active() ) {
my_numa_id = constraints_.numa_id;
my_max_concurrency = constraints_.max_concurrency;
#if __TBB_PREVIEW_TASK_ARENA_CONSTRAINTS_EXTENSION_PRESENT
my_core_type = constraints_.core_type;
my_max_threads_per_core = constraints_.max_threads_per_core;
#endif
my_num_reserved_slots = reserved_for_masters;
my_priority = a_priority;
r1::initialize(*this);
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10 changes: 0 additions & 10 deletions src/tbb/arena.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -436,17 +436,11 @@ void task_arena_impl::initialize(d1::task_arena_base& ta) {
(void)governor::get_thread_data();
if (ta.my_max_concurrency < 1) {
#if __TBB_ARENA_BINDING

#if __TBB_PREVIEW_TASK_ARENA_CONSTRAINTS_EXTENSION_PRESENT
d1::constraints arena_constraints = d1::constraints{}
.set_core_type(ta.core_type())
.set_max_threads_per_core(ta.max_threads_per_core())
.set_numa_id(ta.my_numa_id);
ta.my_max_concurrency = (int)default_concurrency(arena_constraints);
#else /*!__TBB_PREVIEW_TASK_ARENA_CONSTRAINTS_EXTENSION_PRESENT*/
ta.my_max_concurrency = (int)default_concurrency(ta.my_numa_id);
#endif /*!__TBB_PREVIEW_TASK_ARENA_CONSTRAINTS_EXTENSION_PRESENT*/

#else /*!__TBB_ARENA_BINDING*/
ta.my_max_concurrency = (int)governor::default_num_threads();
#endif /*!__TBB_ARENA_BINDING*/
Expand Down Expand Up @@ -736,15 +730,11 @@ int task_arena_impl::max_concurrency(const d1::task_arena_base *ta) {

#if __TBB_ARENA_BINDING
if (ta) {
#if __TBB_PREVIEW_TASK_ARENA_CONSTRAINTS_EXTENSION_PRESENT
d1::constraints arena_constraints = d1::constraints{}
.set_numa_id(ta->my_numa_id)
.set_core_type(ta->core_type())
.set_max_threads_per_core(ta->max_threads_per_core());
return (int)default_concurrency(arena_constraints);
#else /*!__TBB_PREVIEW_TASK_ARENA_CONSTRAINTS_EXTENSION_PRESENT*/
return (int)default_concurrency(ta->my_numa_id);
#endif /*!__TBB_PREVIEW_TASK_ARENA_CONSTRAINTS_EXTENSION_PRESENT*/
}
#endif /*!__TBB_ARENA_BINDING*/

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4 changes: 1 addition & 3 deletions test/common/common_arena_constraints.h
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*
Copyright (c) 2019-2021 Intel Corporation
Copyright (c) 2019-2022 Intel Corporation
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
Expand All @@ -17,8 +17,6 @@
#ifndef __TBB_test_common_arena_constraints_H_
#define __TBB_test_common_arena_constraints_H_

#define TBB_PREVIEW_TASK_ARENA_CONSTRAINTS_EXTENSION 1

#if _WIN32 || _WIN64
#define _CRT_SECURE_NO_WARNINGS
#endif
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