Late c2rust cleanup

gen/generate_interpreter.js

@@ -139,18 +139,18 @@ function gen_instruction_body(encodings, size)
 
         if(has_66.length) {
             const body = gen_instruction_body_after_prefix(has_66, size);
-            if_blocks.push({ condition: "prefixes_ & PREFIX_66 != 0", body, });
+            if_blocks.push({ condition: "prefixes_ & ::prefix::PREFIX_66 != 0", body, });
         }
         if(has_F2.length) {
             const body = gen_instruction_body_after_prefix(has_F2, size);
-            if_blocks.push({ condition: "prefixes_ & PREFIX_F2 != 0", body, });
+            if_blocks.push({ condition: "prefixes_ & ::prefix::PREFIX_F2 != 0", body, });
         }
         if(has_F3.length) {
             const body = gen_instruction_body_after_prefix(has_F3, size);
-            if_blocks.push({ condition: "prefixes_ & PREFIX_F3 != 0", body, });
+            if_blocks.push({ condition: "prefixes_ & ::prefix::PREFIX_F3 != 0", body, });
         }
 
-        const check_prefixes = encoding.sse ? "(PREFIX_66 | PREFIX_F2 | PREFIX_F3)" : "(PREFIX_F2 | PREFIX_F3)";
+        const check_prefixes = encoding.sse ? "(::prefix::PREFIX_66 | ::prefix::PREFIX_F2 | ::prefix::PREFIX_F3)" : "(::prefix::PREFIX_F2 | ::prefix::PREFIX_F3)";
 
         const else_block = {
             body: [].concat(
@@ -160,7 +160,7 @@ function gen_instruction_body(encodings, size)
         };
 
         return [].concat(
-	    "let prefixes_ = *prefixes as i32;",
+	    "let prefixes_ = *prefixes;",
             code,
             {
                 type: "if-else",
@@ -410,7 +410,7 @@ function gen_table()
 
             "use cpu::cpu::{after_block_boundary, modrm_resolve};",
             "use cpu::cpu::{read_imm8, read_imm8s, read_imm16, read_imm32s, read_moffs};",
-            "use cpu::cpu::{task_switch_test, trigger_ud, DEBUG, PREFIX_F2, PREFIX_F3};",
+            "use cpu::cpu::{task_switch_test, trigger_ud, DEBUG};",
             "use cpu::instructions;",
             "use cpu::global_pointers::{instruction_pointer, prefixes};",
 
@@ -474,7 +474,7 @@ function gen_table()
             "use cpu::cpu::{after_block_boundary, modrm_resolve};",
             "use cpu::cpu::{read_imm8, read_imm16, read_imm32s};",
             "use cpu::cpu::{task_switch_test, task_switch_test_mmx, trigger_ud};",
-            "use cpu::cpu::{DEBUG, PREFIX_66, PREFIX_F2, PREFIX_F3};",
+            "use cpu::cpu::DEBUG;",
             "use cpu::instructions_0f;",
             "use cpu::global_pointers::{instruction_pointer, prefixes};",
 

src/rust/analysis.rs

@@ -47,7 +47,7 @@ pub fn analyze_step_handle_segment_prefix(
     analysis: &mut Analysis,
 ) {
     dbg_assert!(segment <= 5);
-    cpu.prefixes |= segment + 1;
+    cpu.prefixes |= segment as u8 + 1;
     analyze_step_handle_prefix(cpu, analysis)
 }
 

src/rust/cpu/cpu.rs

@@ -16,6 +16,7 @@ extern "C" {
 }
 
 use config;
+use prefix;
 use cpu::fpu::fpu_set_tag_word;
 use cpu::global_pointers::*;
 use cpu::memory;
@@ -220,17 +221,6 @@ pub const IA32_APIC_BASE_EXTD: i32 = 1 << 10;
 pub const IA32_APIC_BASE_EN: i32 = 1 << 11;
 
 pub const APIC_ADDRESS: i32 = 0xFEE00000u32 as i32;
-pub const SEG_PREFIX_NONE: i32 = -1;
-pub const SEG_PREFIX_ZERO: i32 = 7;
-pub const PREFIX_MASK_REP: i32 = 24;
-pub const PREFIX_REPZ: i32 = 8;
-pub const PREFIX_REPNZ: i32 = 16;
-pub const PREFIX_MASK_SEGMENT: i32 = 7;
-pub const PREFIX_MASK_OPSIZE: i32 = 32;
-pub const PREFIX_MASK_ADDRSIZE: i32 = 64;
-pub const PREFIX_F2: i32 = PREFIX_REPNZ;
-pub const PREFIX_F3: i32 = PREFIX_REPZ;
-pub const PREFIX_66: i32 = PREFIX_MASK_OPSIZE;
 
 pub const MXCSR_MASK: i32 = 0xffff;
 pub const MXCSR_FZ: i32 = 1 << 15;
@@ -2410,12 +2400,12 @@ pub unsafe fn read_imm32s() -> OrPageFault<i32> {
 
 pub unsafe fn is_osize_32() -> bool {
     dbg_assert!(!in_jit);
-    return *is_32 != (*prefixes as i32 & PREFIX_MASK_OPSIZE == PREFIX_MASK_OPSIZE);
+    return *is_32 != (*prefixes & prefix::PREFIX_MASK_OPSIZE == prefix::PREFIX_MASK_OPSIZE);
 }
 
 pub unsafe fn is_asize_32() -> bool {
     dbg_assert!(!in_jit);
-    return *is_32 != (*prefixes as i32 & PREFIX_MASK_ADDRSIZE == PREFIX_MASK_ADDRSIZE);
+    return *is_32 != (*prefixes & prefix::PREFIX_MASK_ADDRSIZE == prefix::PREFIX_MASK_ADDRSIZE);
 }
 
 pub unsafe fn lookup_segment_selector(
@@ -2827,13 +2817,13 @@ pub unsafe fn get_seg_ss() -> i32 { return *segment_offsets.offset(SS as isize);
 
 pub unsafe fn get_seg_prefix(default_segment: i32) -> OrPageFault<i32> {
     dbg_assert!(!in_jit);
-    let prefix = *prefixes as i32 & PREFIX_MASK_SEGMENT;
+    let prefix = *prefixes & prefix::PREFIX_MASK_SEGMENT;
     if 0 != prefix {
-        if prefix == SEG_PREFIX_ZERO {
+        if prefix == prefix::SEG_PREFIX_ZERO {
             return Ok(0);
         }
         else {
-            return get_seg(prefix - 1);
+            return get_seg(prefix as i32 - 1);
         }
     }
     else {
@@ -3092,8 +3082,8 @@ pub unsafe fn run_prefix_instruction() {
 }
 
 pub unsafe fn segment_prefix_op(seg: i32) {
-    dbg_assert!(seg <= 5);
-    *prefixes = (*prefixes as i32 | seg + 1) as u8;
+    dbg_assert!(seg <= 5 && seg >= 0);
+    *prefixes |= seg as u8 + 1;
     run_prefix_instruction();
     *prefixes = 0
 }

src/rust/cpu/instructions.rs

@@ -4,6 +4,7 @@ extern "C" {
     fn hlt_op();
 }
 
+use prefix;
 use cpu::arith::*;
 use cpu::cpu::*;
 use cpu::fpu::*;
@@ -573,14 +574,14 @@ pub unsafe fn instr_65() { segment_prefix_op(GS); }
 
 pub unsafe fn instr_66() {
     // Operand-size override prefix
-    *prefixes = (*prefixes as i32 | PREFIX_MASK_OPSIZE) as u8;
+    *prefixes |= prefix::PREFIX_MASK_OPSIZE;
     run_prefix_instruction();
     *prefixes = 0;
 }
 pub unsafe fn instr_67() {
     // Address-size override prefix
     dbg_assert!(is_asize_32() == *is_32);
-    *prefixes = (*prefixes as i32 | PREFIX_MASK_ADDRSIZE) as u8;
+    *prefixes |= prefix::PREFIX_MASK_ADDRSIZE;
     run_prefix_instruction();
     *prefixes = 0;
 }
@@ -899,7 +900,7 @@ pub unsafe fn instr16_8D_reg(_r: i32, _r2: i32) {
 }
 pub unsafe fn instr16_8D_mem(modrm_byte: i32, r: i32) {
     // lea
-    *prefixes = (*prefixes as i32 | SEG_PREFIX_ZERO) as u8;
+    *prefixes |= prefix::SEG_PREFIX_ZERO;
     if let Ok(addr) = modrm_resolve(modrm_byte) {
         write_reg16(r, addr);
     }
@@ -912,7 +913,7 @@ pub unsafe fn instr32_8D_reg(_r: i32, _r2: i32) {
 pub unsafe fn instr32_8D_mem(modrm_byte: i32, r: i32) {
     // lea
     // override prefix, so modrm_resolve does not return the segment part
-    *prefixes = (*prefixes as i32 | SEG_PREFIX_ZERO) as u8;
+    *prefixes |= prefix::SEG_PREFIX_ZERO;
     if let Ok(addr) = modrm_resolve(modrm_byte) {
         write_reg32(r, addr);
     }
@@ -2182,15 +2183,15 @@ pub unsafe fn instr_F1() {
 
 pub unsafe fn instr_F2() {
     // repnz
-    dbg_assert!(*prefixes as i32 & PREFIX_MASK_REP == 0);
-    *prefixes = (*prefixes as i32 | PREFIX_REPNZ) as u8;
+    dbg_assert!(*prefixes & prefix::PREFIX_MASK_REP == 0);
+    *prefixes |= prefix::PREFIX_REPNZ;
     run_prefix_instruction();
     *prefixes = 0;
 }
 pub unsafe fn instr_F3() {
     // repz
-    dbg_assert!(*prefixes as i32 & PREFIX_MASK_REP == 0);
-    *prefixes = (*prefixes as i32 | PREFIX_REPZ) as u8;
+    dbg_assert!(*prefixes & prefix::PREFIX_MASK_REP == 0);
+    *prefixes |= prefix::PREFIX_REPZ;
     run_prefix_instruction();
     *prefixes = 0;
 }

src/rust/cpu_context.rs

@@ -5,7 +5,7 @@ use state_flags::CachedStateFlags;
 #[derive(Clone)]
 pub struct CpuContext {
     pub eip: u32,
-    pub prefixes: u32,
+    pub prefixes: u8,
     pub cs_offset: u32,
     pub state_flags: CachedStateFlags,
 }

src/rust/jit_instructions.rs

@@ -92,7 +92,7 @@ pub fn jit_handle_prefix(ctx: &mut JitContext, instr_flags: &mut u32) {
 
 pub fn jit_handle_segment_prefix(segment: u32, ctx: &mut JitContext, instr_flags: &mut u32) {
     dbg_assert!(segment <= 5);
-    ctx.cpu.prefixes |= segment + 1;
+    ctx.cpu.prefixes |= segment as u8 + 1;
     jit_handle_prefix(ctx, instr_flags)
 }
 

src/rust/modrm.rs

@@ -241,7 +241,7 @@ pub fn gen(ctx: &mut JitContext, modrm_byte: ModrmByte) {
 
 pub fn get_as_reg_index_if_possible(ctx: &mut JitContext, modrm_byte: &ModrmByte) -> Option<u32> {
     let prefix = ctx.cpu.prefixes & PREFIX_MASK_SEGMENT;
-    let seg = if prefix != 0 { prefix - 1 } else { modrm_byte.segment };
+    let seg = if prefix != 0 { (prefix - 1) as u32 } else { modrm_byte.segment };
     if can_optimize_get_seg(ctx, seg)
         && modrm_byte.second_reg.is_none()
         && modrm_byte.immediate == 0
@@ -275,7 +275,7 @@ pub fn jit_add_seg_offset(ctx: &mut JitContext, default_segment: u32) {
         return;
     }
 
-    let seg = if prefix != 0 { prefix - 1 } else { default_segment };
+    let seg = if prefix != 0 { (prefix - 1) as u32 } else { default_segment };
     jit_add_seg_offset_no_override(ctx, seg);
 }
 

src/rust/prefix.rs

@@ -1,14 +1,15 @@
-pub const PREFIX_REPZ: u32 = 0b01000;
-pub const PREFIX_REPNZ: u32 = 0b10000;
+pub const PREFIX_REPZ: u8 = 0b01000;
+pub const PREFIX_REPNZ: u8 = 0b10000;
+pub const PREFIX_MASK_REP: u8 = PREFIX_REPZ | PREFIX_REPNZ;
 
-pub const PREFIX_MASK_OPSIZE: u32 = 0b100000;
-pub const PREFIX_MASK_ADDRSIZE: u32 = 0b1000000;
+pub const PREFIX_MASK_OPSIZE: u8 = 0b100000;
+pub const PREFIX_MASK_ADDRSIZE: u8 = 0b1000000;
 
-pub const PREFIX_66: u32 = PREFIX_MASK_OPSIZE;
-pub const PREFIX_67: u32 = PREFIX_MASK_ADDRSIZE;
-pub const PREFIX_F2: u32 = PREFIX_REPNZ;
-pub const PREFIX_F3: u32 = PREFIX_REPZ;
+pub const PREFIX_66: u8 = PREFIX_MASK_OPSIZE;
+pub const PREFIX_67: u8 = PREFIX_MASK_ADDRSIZE;
+pub const PREFIX_F2: u8 = PREFIX_REPNZ;
+pub const PREFIX_F3: u8 = PREFIX_REPZ;
 
-pub const SEG_PREFIX_ZERO: u32 = 7;
+pub const SEG_PREFIX_ZERO: u8 = 7;
 
-pub const PREFIX_MASK_SEGMENT: u32 = 0b111;
+pub const PREFIX_MASK_SEGMENT: u8 = 0b111;