jit {,66}0F{54,55,56,57} ({and,andn,or,xor}{ps,pd})

BunsDev · Apr 4, 2021 · 12ec5d7 · 12ec5d7
1 parent 03566c2
commit 12ec5d7
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Showing 3 changed files with 68 additions and 24 deletions.
diff --git a/gen/x86_table.js b/gen/x86_table.js
@@ -683,14 +683,14 @@ const encodings = [
     { sse: 1, opcode: 0x0F53, e: 1, skip: 1, custom: 1 },
     { sse: 1, opcode: 0xF30F53, e: 1, skip: 1, custom: 1 },
 
-    { sse: 1, opcode: 0x0F54, e: 1 },
-    { sse: 1, opcode: 0x660F54, e: 1 },
-    { sse: 1, opcode: 0x0F55, e: 1 },
-    { sse: 1, opcode: 0x660F55, e: 1 },
-    { sse: 1, opcode: 0x0F56, e: 1 },
-    { sse: 1, opcode: 0x660F56, e: 1 },
-    { sse: 1, opcode: 0x0F57, e: 1 },
-    { sse: 1, opcode: 0x660F57, e: 1 },
+    { sse: 1, opcode: 0x0F54, e: 1, custom: 1 },
+    { sse: 1, opcode: 0x660F54, e: 1, custom: 1 },
+    { sse: 1, opcode: 0x0F55, e: 1, custom: 1 },
+    { sse: 1, opcode: 0x660F55, e: 1, custom: 1 },
+    { sse: 1, opcode: 0x0F56, e: 1, custom: 1 },
+    { sse: 1, opcode: 0x660F56, e: 1, custom: 1 },
+    { sse: 1, opcode: 0x0F57, e: 1, custom: 1 },
+    { sse: 1, opcode: 0x660F57, e: 1, custom: 1 },
 
     { sse: 1, opcode: 0x0F58, e: 1, },
     { sse: 1, opcode: 0x660F58, e: 1, },

diff --git a/src/rust/cpu/instructions_0f.rs b/src/rust/cpu/instructions_0f.rs
@@ -1683,91 +1683,83 @@ pub unsafe fn instr_F30F53_mem(addr: i32, r: i32) {
     instr_F30F53(return_on_pagefault!(safe_read_f32(addr)), r);
 }
 
+#[no_mangle]
 pub unsafe fn instr_0F54(source: reg128, r: i32) {
     // andps xmm, xmm/mem128
     // XXX: Aligned access or #gp
     pand_r128(source, r);
 }
-#[no_mangle]
 pub unsafe fn instr_0F54_reg(r1: i32, r2: i32) { instr_0F54(read_xmm128s(r1), r2); }
-#[no_mangle]
 pub unsafe fn instr_0F54_mem(addr: i32, r: i32) {
     instr_0F54(return_on_pagefault!(safe_read128s(addr)), r);
 }
+#[no_mangle]
 pub unsafe fn instr_660F54(source: reg128, r: i32) {
     // andpd xmm, xmm/mem128
     // XXX: Aligned access or #gp
     pand_r128(source, r);
 }
-#[no_mangle]
 pub unsafe fn instr_660F54_reg(r1: i32, r2: i32) { instr_660F54(read_xmm128s(r1), r2); }
-#[no_mangle]
 pub unsafe fn instr_660F54_mem(addr: i32, r: i32) {
     instr_660F54(return_on_pagefault!(safe_read128s(addr)), r);
 }
+#[no_mangle]
 pub unsafe fn instr_0F55(source: reg128, r: i32) {
     // andnps xmm, xmm/mem128
     // XXX: Aligned access or #gp
     pandn_r128(source, r);
 }
-#[no_mangle]
 pub unsafe fn instr_0F55_reg(r1: i32, r2: i32) { instr_0F55(read_xmm128s(r1), r2); }
-#[no_mangle]
 pub unsafe fn instr_0F55_mem(addr: i32, r: i32) {
     instr_0F55(return_on_pagefault!(safe_read128s(addr)), r);
 }
+#[no_mangle]
 pub unsafe fn instr_660F55(source: reg128, r: i32) {
     // andnpd xmm, xmm/mem128
     // XXX: Aligned access or #gp
     pandn_r128(source, r);
 }
-#[no_mangle]
 pub unsafe fn instr_660F55_reg(r1: i32, r2: i32) { instr_660F55(read_xmm128s(r1), r2); }
-#[no_mangle]
 pub unsafe fn instr_660F55_mem(addr: i32, r: i32) {
     instr_660F55(return_on_pagefault!(safe_read128s(addr)), r);
 }
+#[no_mangle]
 pub unsafe fn instr_0F56(source: reg128, r: i32) {
     // orps xmm, xmm/mem128
     // XXX: Aligned access or #gp
     por_r128(source, r);
 }
-#[no_mangle]
 pub unsafe fn instr_0F56_reg(r1: i32, r2: i32) { instr_0F56(read_xmm128s(r1), r2); }
-#[no_mangle]
 pub unsafe fn instr_0F56_mem(addr: i32, r: i32) {
     instr_0F56(return_on_pagefault!(safe_read128s(addr)), r);
 }
+#[no_mangle]
 pub unsafe fn instr_660F56(source: reg128, r: i32) {
     // orpd xmm, xmm/mem128
     // XXX: Aligned access or #gp
     por_r128(source, r);
 }
-#[no_mangle]
 pub unsafe fn instr_660F56_reg(r1: i32, r2: i32) { instr_660F56(read_xmm128s(r1), r2); }
-#[no_mangle]
 pub unsafe fn instr_660F56_mem(addr: i32, r: i32) {
     instr_660F56(return_on_pagefault!(safe_read128s(addr)), r);
 }
+#[no_mangle]
 pub unsafe fn instr_0F57(source: reg128, r: i32) {
     // xorps xmm, xmm/mem128
     // XXX: Aligned access or #gp
     pxor_r128(source, r);
 }
-#[no_mangle]
 pub unsafe fn instr_0F57_reg(r1: i32, r2: i32) { instr_0F57(read_xmm128s(r1), r2); }
-#[no_mangle]
 pub unsafe fn instr_0F57_mem(addr: i32, r: i32) {
     instr_0F57(return_on_pagefault!(safe_read128s(addr)), r);
 }
+#[no_mangle]
 pub unsafe fn instr_660F57(source: reg128, r: i32) {
     // xorpd xmm, xmm/mem128
     // XXX: Aligned access or #gp
     pxor_r128(source, r);
 }
-#[no_mangle]
 pub unsafe fn instr_660F57_reg(r1: i32, r2: i32) { instr_660F57(read_xmm128s(r1), r2); }
-#[no_mangle]
 pub unsafe fn instr_660F57_mem(addr: i32, r: i32) {
     instr_660F57(return_on_pagefault!(safe_read128s(addr)), r);
 }

diff --git a/src/rust/jit_instructions.rs b/src/rust/jit_instructions.rs
@@ -5196,6 +5196,58 @@ pub fn instr_F30F53_reg_jit(ctx: &mut JitContext, r1: u32, r2: u32) {
     sse_read_f32_xmm_xmm(ctx, "instr_F30F53", r1, r2);
 }
 
+pub fn instr_0F54_mem_jit(ctx: &mut JitContext, modrm_byte: ModrmByte, r: u32) {
+    sse_read128_xmm_mem(ctx, "instr_0F54", modrm_byte, r);
+}
+pub fn instr_0F54_reg_jit(ctx: &mut JitContext, r1: u32, r2: u32) {
+    sse_read128_xmm_xmm(ctx, "instr_0F54", r1, r2);
+}
+pub fn instr_660F54_mem_jit(ctx: &mut JitContext, modrm_byte: ModrmByte, r: u32) {
+    sse_read128_xmm_mem(ctx, "instr_660F54", modrm_byte, r);
+}
+pub fn instr_660F54_reg_jit(ctx: &mut JitContext, r1: u32, r2: u32) {
+    sse_read128_xmm_xmm(ctx, "instr_660F54", r1, r2);
+}
+
+pub fn instr_0F55_mem_jit(ctx: &mut JitContext, modrm_byte: ModrmByte, r: u32) {
+    sse_read128_xmm_mem(ctx, "instr_0F55", modrm_byte, r);
+}
+pub fn instr_0F55_reg_jit(ctx: &mut JitContext, r1: u32, r2: u32) {
+    sse_read128_xmm_xmm(ctx, "instr_0F55", r1, r2);
+}
+pub fn instr_660F55_mem_jit(ctx: &mut JitContext, modrm_byte: ModrmByte, r: u32) {
+    sse_read128_xmm_mem(ctx, "instr_660F55", modrm_byte, r);
+}
+pub fn instr_660F55_reg_jit(ctx: &mut JitContext, r1: u32, r2: u32) {
+    sse_read128_xmm_xmm(ctx, "instr_660F55", r1, r2);
+}
+
+pub fn instr_0F56_mem_jit(ctx: &mut JitContext, modrm_byte: ModrmByte, r: u32) {
+    sse_read128_xmm_mem(ctx, "instr_0F56", modrm_byte, r);
+}
+pub fn instr_0F56_reg_jit(ctx: &mut JitContext, r1: u32, r2: u32) {
+    sse_read128_xmm_xmm(ctx, "instr_0F56", r1, r2);
+}
+pub fn instr_660F56_mem_jit(ctx: &mut JitContext, modrm_byte: ModrmByte, r: u32) {
+    sse_read128_xmm_mem(ctx, "instr_660F56", modrm_byte, r);
+}
+pub fn instr_660F56_reg_jit(ctx: &mut JitContext, r1: u32, r2: u32) {
+    sse_read128_xmm_xmm(ctx, "instr_660F56", r1, r2);
+}
+
+pub fn instr_0F57_mem_jit(ctx: &mut JitContext, modrm_byte: ModrmByte, r: u32) {
+    sse_read128_xmm_mem(ctx, "instr_0F57", modrm_byte, r);
+}
+pub fn instr_0F57_reg_jit(ctx: &mut JitContext, r1: u32, r2: u32) {
+    sse_read128_xmm_xmm(ctx, "instr_0F57", r1, r2);
+}
+pub fn instr_660F57_mem_jit(ctx: &mut JitContext, modrm_byte: ModrmByte, r: u32) {
+    sse_read128_xmm_mem(ctx, "instr_660F57", modrm_byte, r);
+}
+pub fn instr_660F57_reg_jit(ctx: &mut JitContext, r1: u32, r2: u32) {
+    sse_read128_xmm_xmm(ctx, "instr_660F57", r1, r2);
+}
+
 pub fn instr_0F60_mem_jit(ctx: &mut JitContext, modrm_byte: ModrmByte, r: u32) {
     mmx_read64_mm_mem32(ctx, "instr_0F60", modrm_byte, r);
 }