Skip to content
View BoomNZoom's full-sized avatar

Block or report BoomNZoom

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Popular repositories Loading

  1. MIPS MIPS Public

    A verilog representation of a MIPS processor and a system verilog implementation of testbenches for various parts of this CPU.It is all about seeing if it works as intended.Work in progress.

    Verilog

  2. LaneDetection-basic--sobel- LaneDetection-basic--sobel- Public

    A simple program that uses filters(in open cv and numpy) to select various portions of an image,turn these into grayscale,then into black & white and finally to slightly blur these and detect some …

    Python

  3. FSM FSM Public

    Verilog program that describes a FSM,testbench to follow soon

    Verilog