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[Intel] AVX-512-FP16 instructions unsupported #408

Description

@gnrkr789

Issue

TestCraft detected that B2R2 does not support the AVX-512 FP16 (half-precision floating-point) instruction set.

These instructions raise ParsingFailureException. This issue was detected using objdump 2.46 as the reference decoder. The bundled Capstone build also fails to decode these FP16 instructions, so this unsupported instruction set can be missed without an up-to-date reference decoder.

Details

  • 1192 encoded forms across 52 mnemonics fail to decode.

  • Affected mnemonics include:

    • arithmetic: VADDPH, VSUBPH, VMULPH, VDIVPH, VSQRTPH, VRCPPH, VRSQRTPH, VSCALEFPH, VMINPH, VMAXPH
    • converts: VCVTPH2{W,UW,DQ,UDQ,QQ,UQQ,PS,PD}, VCVT{,T}PH2*, VCVT*2PH, VCVTPS2PHX
    • FMA: VFMADD{132,213,231}PH, VFMSUB*PH, VFMADDSUB*PH, VFMSUBADD*PH
    • complex FMA: VFMADDCPH, VFCMADDCPH, VFMULCPH, VFCMULCPH and the scalar *CSH forms
    • misc: VGETMANTPH, VRNDSCALEPH, VREDUCEPH, VFPCLASSPH

Expected Behavior

The AVX-512 FP16 instructions should decode to the correct mnemonic and operands, including the W/pp/map fields and FP16 operand widths.

Actual Behavior

B2R2 raises ParsingFailureException.

References

Intel SDM, Vol. 2 — the AVX-512 FP16 instruction reference.

Detection

This issue was detected via TestCraft using objdump 2.46 as the reference decoder. Capstone was not used as the reference for this issue because the bundled Capstone build also fails to decode the affected FP16 instructions.

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