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Merge tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux-2.6
Pull GPIO updates from Grant Likely: "GPIO follow up patch and type change for v3.5 merge window Primarily device driver additions, features and bug fixes. Not much touching gpio common subsystem support. Should not be scary." * tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux-2.6: (34 commits) gpio: Provide the STMPE GPIO driver with its own IRQ Domain gpio: add TS-5500 DIO blocks support gpio: pcf857x: use client->irq for gpio_to_irq() gpio: stmpe: Add DT support for stmpe gpio gpio: pl061 depends on ARM gpio/pl061: remove old comment gpio: SPEAr: add spi chipselect control driver gpio: gpio-max710x: Support device tree probing gpio: twl4030: Use only TWL4030_MODULE_LED for LED configuration gpio: tegra: read output value when gpio is set in direction_out gpio: pca953x: Add compatible strings to gpio-pca953x driver gpio: pca953x: Register an IRQ domain gpio: mvebu: Set free callback for gpio_chip gpio: tegra: Drop exporting static functions gpio: tegra: Staticize non-exported symbols gpio: tegra: fix suspend/resume apis gpio-pch: Set parent dev for gpio chip gpio: em: Fix build errors GPIO: clps711x: use platform_device_unregister in gpio_clps711x_init() gpio/tc3589x: convert to use the simple irqdomain ...
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,18 @@ | ||
| STMPE gpio | ||
| ---------- | ||
|
|
||
| Required properties: | ||
| - compatible: "st,stmpe-gpio" | ||
|
|
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| Optional properties: | ||
| - st,norequest-mask: bitmask specifying which GPIOs should _not_ be requestable | ||
| due to different usage (e.g. touch, keypad) | ||
|
|
||
| Node name must be stmpe_gpio and should be child node of stmpe node to which it | ||
| belongs. | ||
|
|
||
| Example: | ||
| stmpe_gpio { | ||
| compatible = "st,stmpe-gpio"; | ||
| st,norequest-mask = <0x20>; //gpio 5 can't be used | ||
| }; |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,50 @@ | ||
| === ST Microelectronics SPEAr SPI CS Driver === | ||
|
|
||
| SPEAr platform provides a provision to control chipselects of ARM PL022 Prime | ||
| Cell spi controller through its system registers, which otherwise remains under | ||
| PL022 control. If chipselect remain under PL022 control then they would be | ||
| released as soon as transfer is over and TxFIFO becomes empty. This is not | ||
| desired by some of the device protocols above spi which expect (multiple) | ||
| transfers without releasing their chipselects. | ||
|
|
||
| Chipselects can be controlled by software by turning them as GPIOs. SPEAr | ||
| provides another interface through system registers through which software can | ||
| directly control each PL022 chipselect. Hence, it is natural for SPEAr to export | ||
| the control of this interface as gpio. | ||
|
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||
| Required properties: | ||
|
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| * compatible: should be defined as "st,spear-spics-gpio" | ||
| * reg: mentioning address range of spics controller | ||
| * st-spics,peripcfg-reg: peripheral configuration register offset | ||
| * st-spics,sw-enable-bit: bit offset to enable sw control | ||
| * st-spics,cs-value-bit: bit offset to drive chipselect low or high | ||
| * st-spics,cs-enable-mask: chip select number bit mask | ||
| * st-spics,cs-enable-shift: chip select number program offset | ||
| * gpio-controller: Marks the device node as gpio controller | ||
| * #gpio-cells: should be 1 and will mention chip select number | ||
|
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| All the above bit offsets are within peripcfg register. | ||
|
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||
| Example: | ||
| ------- | ||
| spics: spics@e0700000{ | ||
| compatible = "st,spear-spics-gpio"; | ||
| reg = <0xe0700000 0x1000>; | ||
| st-spics,peripcfg-reg = <0x3b0>; | ||
| st-spics,sw-enable-bit = <12>; | ||
| st-spics,cs-value-bit = <11>; | ||
| st-spics,cs-enable-mask = <3>; | ||
| st-spics,cs-enable-shift = <8>; | ||
| gpio-controller; | ||
| #gpio-cells = <2>; | ||
| }; | ||
|
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||
|
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| spi0: spi@e0100000 { | ||
| status = "okay"; | ||
| num-cs = <3>; | ||
| cs-gpios = <&gpio1 7 0>, <&spics 0>, | ||
| <&spics 1>; | ||
| ... | ||
| } |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,199 @@ | ||
| /* | ||
| * CLPS711X GPIO driver | ||
| * | ||
| * Copyright (C) 2012 Alexander Shiyan <shc_work@mail.ru> | ||
| * | ||
| * This program is free software; you can redistribute it and/or modify | ||
| * it under the terms of the GNU General Public License as published by | ||
| * the Free Software Foundation; either version 2 of the License, or | ||
| * (at your option) any later version. | ||
| */ | ||
|
|
||
| #include <linux/io.h> | ||
| #include <linux/slab.h> | ||
| #include <linux/gpio.h> | ||
| #include <linux/module.h> | ||
| #include <linux/spinlock.h> | ||
| #include <linux/platform_device.h> | ||
|
|
||
| #include <mach/hardware.h> | ||
|
|
||
| #define CLPS711X_GPIO_PORTS 5 | ||
| #define CLPS711X_GPIO_NAME "gpio-clps711x" | ||
|
|
||
| struct clps711x_gpio { | ||
| struct gpio_chip chip[CLPS711X_GPIO_PORTS]; | ||
| spinlock_t lock; | ||
| }; | ||
|
|
||
| static void __iomem *clps711x_ports[] = { | ||
| CLPS711X_VIRT_BASE + PADR, | ||
| CLPS711X_VIRT_BASE + PBDR, | ||
| CLPS711X_VIRT_BASE + PCDR, | ||
| CLPS711X_VIRT_BASE + PDDR, | ||
| CLPS711X_VIRT_BASE + PEDR, | ||
| }; | ||
|
|
||
| static void __iomem *clps711x_pdirs[] = { | ||
| CLPS711X_VIRT_BASE + PADDR, | ||
| CLPS711X_VIRT_BASE + PBDDR, | ||
| CLPS711X_VIRT_BASE + PCDDR, | ||
| CLPS711X_VIRT_BASE + PDDDR, | ||
| CLPS711X_VIRT_BASE + PEDDR, | ||
| }; | ||
|
|
||
| #define clps711x_port(x) clps711x_ports[x->base / 8] | ||
| #define clps711x_pdir(x) clps711x_pdirs[x->base / 8] | ||
|
|
||
| static int gpio_clps711x_get(struct gpio_chip *chip, unsigned offset) | ||
| { | ||
| return !!(readb(clps711x_port(chip)) & (1 << offset)); | ||
| } | ||
|
|
||
| static void gpio_clps711x_set(struct gpio_chip *chip, unsigned offset, | ||
| int value) | ||
| { | ||
| int tmp; | ||
| unsigned long flags; | ||
| struct clps711x_gpio *gpio = dev_get_drvdata(chip->dev); | ||
|
|
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| spin_lock_irqsave(&gpio->lock, flags); | ||
| tmp = readb(clps711x_port(chip)) & ~(1 << offset); | ||
| if (value) | ||
| tmp |= 1 << offset; | ||
| writeb(tmp, clps711x_port(chip)); | ||
| spin_unlock_irqrestore(&gpio->lock, flags); | ||
| } | ||
|
|
||
| static int gpio_clps711x_dir_in(struct gpio_chip *chip, unsigned offset) | ||
| { | ||
| int tmp; | ||
| unsigned long flags; | ||
| struct clps711x_gpio *gpio = dev_get_drvdata(chip->dev); | ||
|
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| spin_lock_irqsave(&gpio->lock, flags); | ||
| tmp = readb(clps711x_pdir(chip)) & ~(1 << offset); | ||
| writeb(tmp, clps711x_pdir(chip)); | ||
| spin_unlock_irqrestore(&gpio->lock, flags); | ||
|
|
||
| return 0; | ||
| } | ||
|
|
||
| static int gpio_clps711x_dir_out(struct gpio_chip *chip, unsigned offset, | ||
| int value) | ||
| { | ||
| int tmp; | ||
| unsigned long flags; | ||
| struct clps711x_gpio *gpio = dev_get_drvdata(chip->dev); | ||
|
|
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| spin_lock_irqsave(&gpio->lock, flags); | ||
| tmp = readb(clps711x_pdir(chip)) | (1 << offset); | ||
| writeb(tmp, clps711x_pdir(chip)); | ||
| tmp = readb(clps711x_port(chip)) & ~(1 << offset); | ||
| if (value) | ||
| tmp |= 1 << offset; | ||
| writeb(tmp, clps711x_port(chip)); | ||
| spin_unlock_irqrestore(&gpio->lock, flags); | ||
|
|
||
| return 0; | ||
| } | ||
|
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| static int gpio_clps711x_dir_in_inv(struct gpio_chip *chip, unsigned offset) | ||
| { | ||
| int tmp; | ||
| unsigned long flags; | ||
| struct clps711x_gpio *gpio = dev_get_drvdata(chip->dev); | ||
|
|
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| spin_lock_irqsave(&gpio->lock, flags); | ||
| tmp = readb(clps711x_pdir(chip)) | (1 << offset); | ||
| writeb(tmp, clps711x_pdir(chip)); | ||
| spin_unlock_irqrestore(&gpio->lock, flags); | ||
|
|
||
| return 0; | ||
| } | ||
|
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| static int gpio_clps711x_dir_out_inv(struct gpio_chip *chip, unsigned offset, | ||
| int value) | ||
| { | ||
| int tmp; | ||
| unsigned long flags; | ||
| struct clps711x_gpio *gpio = dev_get_drvdata(chip->dev); | ||
|
|
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| spin_lock_irqsave(&gpio->lock, flags); | ||
| tmp = readb(clps711x_pdir(chip)) & ~(1 << offset); | ||
| writeb(tmp, clps711x_pdir(chip)); | ||
| tmp = readb(clps711x_port(chip)) & ~(1 << offset); | ||
| if (value) | ||
| tmp |= 1 << offset; | ||
| writeb(tmp, clps711x_port(chip)); | ||
| spin_unlock_irqrestore(&gpio->lock, flags); | ||
|
|
||
| return 0; | ||
| } | ||
|
|
||
| static struct { | ||
| char *name; | ||
| int nr; | ||
| int inv_dir; | ||
| } clps711x_gpio_ports[] __initconst = { | ||
| { "PORTA", 8, 0, }, | ||
| { "PORTB", 8, 0, }, | ||
| { "PORTC", 8, 0, }, | ||
| { "PORTD", 8, 1, }, | ||
| { "PORTE", 3, 0, }, | ||
| }; | ||
|
|
||
| static int __init gpio_clps711x_init(void) | ||
| { | ||
| int i; | ||
| struct platform_device *pdev; | ||
| struct clps711x_gpio *gpio; | ||
|
|
||
| pdev = platform_device_alloc(CLPS711X_GPIO_NAME, 0); | ||
| if (!pdev) { | ||
| pr_err("Cannot create platform device: %s\n", | ||
| CLPS711X_GPIO_NAME); | ||
| return -ENOMEM; | ||
| } | ||
|
|
||
| platform_device_add(pdev); | ||
|
|
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| gpio = devm_kzalloc(&pdev->dev, sizeof(struct clps711x_gpio), | ||
| GFP_KERNEL); | ||
| if (!gpio) { | ||
| dev_err(&pdev->dev, "GPIO allocating memory error\n"); | ||
| platform_device_unregister(pdev); | ||
| return -ENOMEM; | ||
| } | ||
|
|
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| platform_set_drvdata(pdev, gpio); | ||
|
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| spin_lock_init(&gpio->lock); | ||
|
|
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| for (i = 0; i < CLPS711X_GPIO_PORTS; i++) { | ||
| gpio->chip[i].owner = THIS_MODULE; | ||
| gpio->chip[i].dev = &pdev->dev; | ||
| gpio->chip[i].label = clps711x_gpio_ports[i].name; | ||
| gpio->chip[i].base = i * 8; | ||
| gpio->chip[i].ngpio = clps711x_gpio_ports[i].nr; | ||
| gpio->chip[i].get = gpio_clps711x_get; | ||
| gpio->chip[i].set = gpio_clps711x_set; | ||
| if (!clps711x_gpio_ports[i].inv_dir) { | ||
| gpio->chip[i].direction_input = gpio_clps711x_dir_in; | ||
| gpio->chip[i].direction_output = gpio_clps711x_dir_out; | ||
| } else { | ||
| gpio->chip[i].direction_input = gpio_clps711x_dir_in_inv; | ||
| gpio->chip[i].direction_output = gpio_clps711x_dir_out_inv; | ||
| } | ||
| WARN_ON(gpiochip_add(&gpio->chip[i])); | ||
| } | ||
|
|
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| dev_info(&pdev->dev, "GPIO driver initialized\n"); | ||
|
|
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| return 0; | ||
| } | ||
| arch_initcall(gpio_clps711x_init); | ||
|
|
||
| MODULE_LICENSE("GPL v2"); | ||
| MODULE_AUTHOR("Alexander Shiyan <shc_work@mail.ru>"); | ||
| MODULE_DESCRIPTION("CLPS711X GPIO driver"); |
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