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arm64: dts: apple: Replace UART clocking TODO with proper documentation#550

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statick88:fix/apple-dt-uart-clocking
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arm64: dts: apple: Replace UART clocking TODO with proper documentation#550
statick88 wants to merge 1 commit into
AsahiLinux:asahifrom
statick88:fix/apple-dt-uart-clocking

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Summary

Replace speculative TODO comments about UART clocking in 7 Apple Silicon .dtsi files with proper documentation explaining why <&clkref> (24 MHz) is correct.

Background

The TODO comments (figure out the clocking properly, there may be a third selectable clock) were misleading. Analysis of the Samsung-compatible UART driver (samsung_tty.c) shows:

  • The driver sets num_clks = 1 for the S5L variant, only searching for one baud clock (clk_uart_baud0).
  • Baud divisor formula: quot = (rate + (8 * baud)) / (16 * baud)
  • With 24 MHz clkref, standard baud rates achieve <0.2% error (115200 baud: 0.16% error).

Both clocks correctly use the 24 MHz reference clock. No third clock is needed or supported by the driver.

Changes

  • 7 .dtsi files: t8103.dtsi, t8112.dtsi, t8122.dtsi, t6030.dtsi, t600x-die0.dtsi, t602x-die0.dtsi, t6031-die0.dtsi
  • Replaced TODO with explanatory comment documenting the driver analysis

checkpatch.pl

0 errors, 0 warnings, 0 checks

Signed-off-by: Diego Saavedra dsaavedra88@gmail.com

The TODO comments in the Apple SoC device trees speculated about a
"third selectable clock" for the S5L UART. Investigation of the
Samsung-compatible UART driver (samsung_tty.c) shows:

- The driver sets num_clks = 1 for the S5L variant, meaning it only
  searches for one baud clock ("clk_uart_baud0").
- The baud divisor formula is: quot = (rate + (8 * baud)) / (16 * baud)
- With 24 MHz clkref, standard baud rates achieve <0.2% error
  (e.g., 115200 baud: 0.16% error).

Both the "uart" (peripheral bus) and "clk_uart_baud0" (baud rate
generator) clocks correctly use the 24 MHz reference clock. No third
clock is needed or supported by the driver.

Replace the speculative TODO with a comment documenting this finding
across all 7 affected SoC dtsi files.

Signed-off-by: Diego Saavedra <dsaavedra88@gmail.com>
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