event: Convert arch_cpu_init_dm() to use events

Instead of a special function, send an event after driver model is inited and adjust the boards which use this function. Signed-off-by: Simon Glass <sjg@chromium.org>
Android-Boot-Manager · Mar 10, 2022 · 7fe32b3 · 7fe32b3
1 parent 42fdceb
commit 7fe32b3
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Showing 26 changed files with 74 additions and 43 deletions.
diff --git a/arch/Kconfig b/arch/Kconfig
@@ -94,6 +94,7 @@ config NIOS2
 	bool "Nios II architecture"
 	select CPU
 	select DM
+	imply DM_EVENT
 	select OF_CONTROL
 	select SUPPORT_OF_CONTROL
 	imply CMD_DM
@@ -113,6 +114,7 @@ config RISCV
 	select DM
 	imply DM_SERIAL
 	imply DM_ETH
+	imply DM_EVENT
 	imply DM_MMC
 	imply DM_SPI
 	imply DM_SPI_FLASH
@@ -238,6 +240,7 @@ config X86
 	imply CMD_SF_TEST
 	imply CMD_ZBOOT
 	imply DM_ETH
+	imply DM_EVENT
 	imply DM_GPIO
 	imply DM_KEYBOARD
 	imply DM_MMC

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
@@ -774,6 +774,7 @@ config ARCH_OMAP2PLUS
 	select SUPPORT_SPL
 	imply TI_SYSC if DM && OF_CONTROL
 	imply FIT
+	imply DM_EVENT
 
 config ARCH_MESON
 	bool "Amlogic Meson"
@@ -818,6 +819,7 @@ config ARCH_IMX8
 	select MACH_IMX
 	select OF_CONTROL
 	select ENABLE_ARM_SOC_BOOT0_HOOK
+	imply DM_EVENT
 
 config ARCH_IMX8M
 	bool "NXP i.MX8M platform"
@@ -831,6 +833,7 @@ config ARCH_IMX8M
 	select DM
 	select SUPPORT_SPL
 	imply CMD_DM
+	imply DM_EVENT
 
 config ARCH_IMX8ULP
 	bool "NXP i.MX8ULP platform"
@@ -841,6 +844,7 @@ config ARCH_IMX8ULP
 	select SUPPORT_SPL
 	select GPIO_EXTRA_HEADER
 	imply CMD_DM
+	imply DM_EVENT
 
 config ARCH_IMXRT
 	bool "NXP i.MXRT platform"

diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c
@@ -8,6 +8,7 @@
 #include <cpu.h>
 #include <cpu_func.h>
 #include <dm.h>
+#include <event.h>
 #include <init.h>
 #include <log.h>
 #include <asm/cache.h>
@@ -66,7 +67,7 @@ int arch_cpu_init(void)
 	return 0;
 }
 
-int arch_cpu_init_dm(void)
+static int imx8_init_mu(void *ctx, struct event *event)
 {
 	struct udevice *devp;
 	int node, ret;
@@ -88,6 +89,7 @@ int arch_cpu_init_dm(void)
 
 	return 0;
 }
+EVENT_SPY(EVT_DM_POST_INIT, imx8_init_mu);
 
 int print_bootinfo(void)
 {

diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <event.h>
 #include <init.h>
 #include <log.h>
 #include <asm/arch/imx-regs.h>
@@ -494,7 +495,7 @@ static void imx_set_wdog_powerdown(bool enable)
 	writew(enable, &wdog3->wmcr);
 }
 
-int arch_cpu_init_dm(void)
+static int imx8m_check_clock(void *ctx, struct event *event)
 {
 	struct udevice *dev;
 	int ret;
@@ -511,6 +512,7 @@ int arch_cpu_init_dm(void)
 
 	return 0;
 }
+EVENT_SPY(EVT_DM_POST_INIT, imx8m_check_clock);
 
 int arch_cpu_init(void)
 {

diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c
@@ -11,6 +11,7 @@
 #include <asm/mach-imx/boot_mode.h>
 #include <asm/global_data.h>
 #include <efi_loader.h>
+#include <event.h>
 #include <spl.h>
 #include <asm/arch/rdc.h>
 #include <asm/arch/s400_api.h>
@@ -569,7 +570,7 @@ int arch_cpu_init(void)
 	return 0;
 }
 
-int arch_cpu_init_dm(void)
+static int imx8ulp_check_mu(void *ctx, struct event *event)
 {
 	struct udevice *devp;
 	int node, ret;
@@ -584,6 +585,7 @@ int arch_cpu_init_dm(void)
 
 	return 0;
 }
+EVENT_SPY(EVT_DM_POST_INIT, imx8ulp_check_mu);
 
 #if defined(CONFIG_SPL_BUILD)
 __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)

diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c
@@ -11,6 +11,7 @@
 #include <dm.h>
 #include <debug_uart.h>
 #include <errno.h>
+#include <event.h>
 #include <init.h>
 #include <net.h>
 #include <ns16550.h>
@@ -596,11 +597,12 @@ void board_init_f(ulong dummy)
 
 #endif
 
-int arch_cpu_init_dm(void)
+static int am33xx_dm_post_init(void *ctx, struct event *event)
 {
 	hw_data_init();
 #if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
 	early_system_init();
 #endif
 	return 0;
 }
+EVENT_SPY(EVT_DM_POST_INIT, am33xx_dm_post_init);
diff --git a/arch/arm/mach-omap2/hwinit-common.c b/arch/arm/mach-omap2/hwinit-common.c
@@ -12,6 +12,7 @@
  */
 #include <common.h>
 #include <debug_uart.h>
+#include <event.h>
 #include <fdtdec.h>
 #include <init.h>
 #include <spl.h>
@@ -239,11 +240,13 @@ void board_init_f(ulong dummy)
 }
 #endif
 
-int arch_cpu_init_dm(void)
+static int omap2_system_init(void *ctx, struct event *event)
 {
 	early_system_init();
+
 	return 0;
 }
+EVENT_SPY(EVT_DM_POST_INIT, omap2_system_init);
 
 /*
  * Routine: wait_for_command_complete

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
@@ -130,6 +130,7 @@ config MACH_PIC32
 config TARGET_BOSTON
 	bool "Support Boston"
 	select DM
+	imply DM_EVENT
 	select DM_SERIAL
 	select MIPS_CM
 	select SYS_CACHE_SHIFT_6

diff --git a/arch/mips/mach-pic32/cpu.c b/arch/mips/mach-pic32/cpu.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
+#include <event.h>
 #include <init.h>
 #include <malloc.h>
 #include <asm/global_data.h>
@@ -95,12 +96,13 @@ static void prefetch_init(void)
 }
 
 /* arch specific CPU init after DM */
-int arch_cpu_init_dm(void)
+static int pic32_flash_prefetch(void *ctx, struct event *event)
 {
 	/* flash prefetch */
 	prefetch_init();
 	return 0;
 }
+EVENT_SPY(EVT_DM_POST_INIT, pic32_flash_prefetch);
 
 /* Un-gate DDR2 modules (gated by default) */
 static void ddr2_pmd_ungate(void)

diff --git a/arch/nios2/cpu/cpu.c b/arch/nios2/cpu/cpu.c
@@ -10,6 +10,7 @@
 #include <cpu_func.h>
 #include <dm.h>
 #include <errno.h>
+#include <event.h>
 #include <init.h>
 #include <irq_func.h>
 #include <asm/cache.h>
@@ -63,7 +64,7 @@ static void copy_exception_trampoline(void)
 }
 #endif
 
-int arch_cpu_init_dm(void)
+static int nios_cpu_setup(void *ctx, struct event *event)
 {
 	struct udevice *dev;
 	int ret;
@@ -79,6 +80,7 @@ int arch_cpu_init_dm(void)
 
 	return 0;
 }
+EVENT_SPY(EVT_DM_POST_INIT, nios_cpu_setup);
 
 static int altera_nios2_get_desc(const struct udevice *dev, char *buf,
 				 int size)

diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
@@ -7,9 +7,11 @@
 #include <cpu.h>
 #include <dm.h>
 #include <dm/lists.h>
+#include <event.h>
 #include <init.h>
 #include <log.h>
 #include <asm/encoding.h>
+#include <asm/system.h>
 #include <dm/uclass-internal.h>
 #include <linux/bitops.h>
 
@@ -81,7 +83,7 @@ static void dummy_pending_ipi_clear(ulong hart, ulong arg0, ulong arg1)
 }
 #endif
 
-int arch_cpu_init_dm(void)
+int riscv_cpu_setup(void *ctx, struct event *event)
 {
 	int ret;
 
@@ -133,6 +135,7 @@ int arch_cpu_init_dm(void)
 
 	return 0;
 }
+EVENT_SPY(EVT_DM_POST_INIT, riscv_cpu_setup);
 
 int arch_early_init_r(void)
 {

diff --git a/arch/riscv/include/asm/system.h b/arch/riscv/include/asm/system.h
@@ -7,11 +7,16 @@
 #ifndef __ASM_RISCV_SYSTEM_H
 #define __ASM_RISCV_SYSTEM_H
 
+struct event;
+
 /*
  * Interrupt configuring macros.
  *
  * TODO
  *
  */
 
+/* Hook to set up the CPU (called from SPL too) */
+int riscv_cpu_setup(void *ctx, struct event *event);
+
 #endif	/* __ASM_RISCV_SYSTEM_H */
diff --git a/arch/riscv/lib/spl.c b/arch/riscv/lib/spl.c
@@ -11,6 +11,7 @@
 #include <spl.h>
 #include <asm/global_data.h>
 #include <asm/smp.h>
+#include <asm/system.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -27,7 +28,7 @@ __weak void board_init_f(ulong dummy)
 	if (ret)
 		panic("spl_early_init() failed: %d\n", ret);
 
-	arch_cpu_init_dm();
+	riscv_cpu_setup(NULL, NULL);
 
 	preloader_console_init();
 

diff --git a/arch/x86/cpu/baytrail/cpu.c b/arch/x86/cpu/baytrail/cpu.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <cpu.h>
 #include <dm.h>
+#include <event.h>
 #include <init.h>
 #include <log.h>
 #include <pci.h>
@@ -44,7 +45,7 @@ static void hsuart_clock_set(void *base)
  * Configure the internal clock of both SIO HS-UARTs, if they are enabled
  * via FSP
  */
-int arch_cpu_init_dm(void)
+static int baytrail_uart_init(void *ctx, struct event *event)
 {
 	struct udevice *dev;
 	void *base;
@@ -63,6 +64,7 @@ int arch_cpu_init_dm(void)
 
 	return 0;
 }
+EVENT_SPY(EVT_DM_POST_INIT, baytrail_uart_init);
 
 static void set_max_freq(void)
 {

diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <dm.h>
 #include <cpu.h>
+#include <event.h>
 #include <init.h>
 #include <log.h>
 #include <asm/cpu.h>
@@ -24,7 +25,7 @@
 #include <asm/arch/pch.h>
 #include <asm/arch/rcb.h>
 
-int arch_cpu_init_dm(void)
+static int broadwell_init_cpu(void *ctx, struct event *event)
 {
 	struct udevice *dev;
 	int ret;
@@ -41,6 +42,7 @@ int arch_cpu_init_dm(void)
 
 	return 0;
 }
+EVENT_SPY(EVT_DM_POST_INIT, broadwell_init_cpu);
 
 void set_max_freq(void)
 {

diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c
@@ -14,6 +14,7 @@
 #include <cpu_func.h>
 #include <dm.h>
 #include <errno.h>
+#include <event.h>
 #include <fdtdec.h>
 #include <init.h>
 #include <log.h>
@@ -53,7 +54,7 @@ int arch_cpu_init(void)
 	return x86_cpu_init_f();
 }
 
-int arch_cpu_init_dm(void)
+static int ivybridge_cpu_init(void *ctx, struct event *ev)
 {
 	struct pci_controller *hose;
 	struct udevice *bus, *dev;
@@ -85,6 +86,7 @@ int arch_cpu_init_dm(void)
 
 	return 0;
 }
+EVENT_SPY(EVT_DM_POST_INIT, ivybridge_cpu_init);
 
 #define PCH_EHCI0_TEMP_BAR0 0xe8000000
 #define PCH_EHCI1_TEMP_BAR0 0xe8000400

diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <event.h>
 #include <init.h>
 #include <mmc.h>
 #include <asm/cache.h>
@@ -247,7 +248,7 @@ int arch_cpu_init(void)
 	return 0;
 }
 
-int arch_cpu_init_dm(void)
+static int quark_init_pcie(void *ctx, struct event *event)
 {
 	/*
 	 * Initialize PCIe controller
@@ -262,6 +263,7 @@ int arch_cpu_init_dm(void)
 
 	return 0;
 }
+EVENT_SPY(EVT_DM_POST_INIT, quark_init_pcie);
 
 int checkcpu(void)
 {