Convert CONFIG_FSL_SATA_V2 to Kconfig

This converts the following to Kconfig: CONFIG_FSL_SATA_V2 Signed-off-by: Tom Rini <trini@konsulko.com>
Android-Boot-Manager · Jun 28, 2022 · 0a816d9 · 0a816d9
1 parent 21af94f
commit 0a816d9
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Showing 53 changed files with 51 additions and 8 deletions.
diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig
@@ -72,6 +72,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666

diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig
@@ -41,6 +41,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666

diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
@@ -62,6 +62,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666

diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
@@ -65,6 +65,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666

diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig
@@ -71,6 +71,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666

diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig
@@ -40,6 +40,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666

diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig
@@ -61,6 +61,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666

diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig
@@ -64,6 +64,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666

diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig
@@ -73,6 +73,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666

diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig
@@ -42,6 +42,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666

diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
@@ -63,6 +63,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666

diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
@@ -66,6 +66,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666

diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig
@@ -72,6 +72,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666

diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig
@@ -41,6 +41,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666

diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig
@@ -62,6 +62,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666

diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig
@@ -65,6 +65,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=66666666

diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig
@@ -46,6 +46,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="FM1@DTSEC1"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y

diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig
@@ -46,6 +46,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="FM1@DTSEC1"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y

diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig
@@ -48,6 +48,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="FM1@DTSEC1"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y

diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig
@@ -43,6 +43,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="FM1@DTSEC1"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_BR0_PRELIM_BOOL=y

diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig
@@ -44,6 +44,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="FM1@DTSEC1"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_ECC=y

diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig
@@ -44,6 +44,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="FM1@DTSEC1"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_ECC=y

diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig
@@ -46,6 +46,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="FM1@DTSEC1"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_ECC=y

diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig
@@ -41,6 +41,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="FM1@DTSEC1"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_ECC=y

diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig
@@ -45,6 +45,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="FM1@DTSEC1"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_ECC=y

diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig
@@ -44,6 +44,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="FM1@DTSEC1"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_ECC=y

diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig
@@ -46,6 +46,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="FM1@DTSEC1"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_ECC=y

diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig
@@ -41,6 +41,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="FM1@DTSEC1"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_ECC=y

diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig
@@ -72,6 +72,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="FM1@DTSEC3"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DYNAMIC_DDR_CLK_FREQ=y

diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig
@@ -72,6 +72,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="FM1@DTSEC3"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DYNAMIC_DDR_CLK_FREQ=y

diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig
@@ -47,6 +47,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="FM1@DTSEC3"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_DYNAMIC_DDR_CLK_FREQ=y
 CONFIG_DIMM_SLOTS_PER_CTLR=2

diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig
@@ -75,6 +75,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="FM1@DTSEC3"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DYNAMIC_DDR_CLK_FREQ=y

diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
@@ -45,6 +45,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="FM1@DTSEC3"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DYNAMIC_DDR_CLK_FREQ=y

diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig
@@ -48,6 +48,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="FM1@DTSEC3"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DYNAMIC_DDR_CLK_FREQ=y

diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig
@@ -74,6 +74,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="FM1@DTSEC3"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=133330000

diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig
@@ -74,6 +74,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="FM1@DTSEC3"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=133330000

diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig
@@ -77,6 +77,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="FM1@DTSEC3"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=133330000

diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig
@@ -50,6 +50,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="FM1@DTSEC3"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=133330000

diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig
@@ -75,6 +75,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="FM1@DTSEC3"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=133330000

diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig
@@ -75,6 +75,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="FM1@DTSEC3"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=133330000

diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig
@@ -78,6 +78,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="FM1@DTSEC3"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=133330000

diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig
@@ -51,6 +51,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="FM1@DTSEC3"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=133330000

diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig
@@ -66,6 +66,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="FM1@DTSEC1"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=133333333

diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig
@@ -42,6 +42,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="FM1@DTSEC1"
 CONFIG_DM=y
+CONFIG_FSL_SATA_V2=y
 CONFIG_SYS_SATA_MAX_DEVICE=2
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=133333333

diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
@@ -113,12 +113,19 @@ config SATA_CEVA
 
 config FSL_SATA
 	bool "Enable Freescale SATA controller driver support"
+	depends on PPC
 	select AHCI
 	select LIBATA
 	help
 	  Enable this driver to support the SATA controller found in
 	  some Freescale PowerPC SoCs.
 
+config FSL_SATA_V2
+	bool "Enable support for V2 of the Freescale SATA controller"
+	depends on FSL_SATA
+	help
+	  Enable support for V2 of this controller, rather than V1.
+
 config SATA_MV
 	bool "Enable Marvell SATA controller driver support"
 	select AHCI

diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
@@ -473,7 +473,6 @@ extern unsigned long get_sdram_size(void);
 #endif	/* CONFIG_TSEC_ENET */
 
 /* SATA */
-#define CONFIG_FSL_SATA_V2
 
 #ifdef CONFIG_FSL_SATA
 #define CONFIG_LBA48

diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
@@ -337,7 +337,6 @@
 #endif	/* CONFIG_PCI */
 
 /* SATA */
-#define CONFIG_FSL_SATA_V2
 
 #ifdef CONFIG_FSL_SATA_V2
 #define CONFIG_LBA48

diff --git a/include/configs/P3041DS.h b/include/configs/P3041DS.h
@@ -9,7 +9,6 @@
  */
 #define CONFIG_FSL_NGPIXIS		/* use common ngPIXIS code */
 
-#define CONFIG_FSL_SATA_V2
 #define CONFIG_PCIE3
 #define CONFIG_PCIE4
 #define CONFIG_SYS_DPAA_RMAN