Error on SPI freq lower than requested one

[LMESTM]

As reported here: #3759 (comment)

With this patch 100KHz no longer works on the Odin (NUCLEO_F439ZI) and NUCLEO_F429ZI. When the SDBlockDevice is used I get:
"Couldn't set suitable SPI freq: request:100000, lowest:328125"

[c1728p9]

100KHz isn't an unreasonable frequency. Can the clock divisor code be updated to divide this low? I think there is a prescaler register (divide up to 256 in powers of 2) and a divider register (divide up to 255).

Edit - the second prescaler register can only be used with I2S.

[LMESTM]

I propose to close this issue for now as corresponding PR was merged.
If issues are reported we'll open a new one.