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Rework register usage in early boot code #99

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danh-arm opened this issue Mar 19, 2014 · 3 comments
Open

Rework register usage in early boot code #99

danh-arm opened this issue Mar 19, 2014 · 3 comments

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@danh-arm
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The very early boot code in BL1 and BL3-1 needs to be reviewed regarding register usage. Currently we are relying on all functions collaborating to not step on each other's toes - this needs to be validated.

This task is motivated by the "TODO" comment in plat/fvp/aarch64/bl1_plat_helpers.S:

// TODO: Not a good idea to save lr in a temp reg

LR is saved in x9, which is a caller-saved register according to the AAPCS and thus x9 should be saved by the caller of platform_get_entrypoint(). This is not done currently but BL1 reset code doesn't use x9 so it's OK. Ideally LR should be pushed on the stack but we don't have stack at this point of time.

One solution is to define a convention of register usage in the early boot code (even if it's not AAPCS compliant) and stick to it.

@danh-arm danh-arm added this to the vNext+1 milestone Mar 21, 2014
@tixy
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tixy commented Mar 25, 2014

How about specifying that a small number of registers (3 say) to be used as a stack, e.g.

function:
    /* Push LR */
    mov x27, x28
    mov x28, x29
    mov x29, x30

    /* Function body which can call other functions */

    /* Pop LR */
    mov x30, x29
    mov x29, x28
    mov x28, x27
    adr x27, debug_build_call_nesting_overflow_panic
    ret

And if we only need three levels of nesting we could get away with reserving two registers instead. Also, the push/pop code could be an assembler macro.

This solution would waste some text section space with the extra instructions, but is more maintainable than trying to pick specific register usage for specific functions.

@athoelke
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I'm not sure there are enough functions used at this stage in the code to warrant a systematic solution. I think step one is to fully review the current situation and make a proposal (or set of proposals for discussion. I would definitely like to make sure this code is not a maintenance hazard - by better coding and/or documentation.

@tixy
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tixy commented Mar 26, 2014

Also, bear in mind some of these early boot functions are implemented in platform specific code, so whatever convention is used should be as clear and robust as possible for people doing porting work. People who quite possibly have never looked at the TF code before and have been given just a few weeks to port it.

@danh-arm danh-arm modified the milestones: vNext+1, vNext Jun 19, 2014
@danh-arm danh-arm modified the milestones: vNext, vNext+1 Sep 9, 2014
@danh-arm danh-arm removed this from the vNext milestone Oct 7, 2015
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