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Minor update of USB Host EHCI_TT and OHCI drivers #34

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Jul 5, 2024
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Minor update of USB Host EHCI_TT and OHCI drivers #34

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Minor update of USB Host EHCI_TT and OHCI drivers config files and do…
MiloradCvjetkovic Jul 4, 2024
e0be4d1
Minor update of USB Host EHCI_TT and OHCI drivers
MiloradCvjetkovic Jul 4, 2024
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20 changes: 10 additions & 10 deletions Documentation/Doxygen/src/introduction.txt
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Expand Up @@ -202,14 +202,14 @@ It is configured via define values in the <b>USBH_EHCI_Config.h</b> configuratio
- <b>USB Host Controller 0</b>:
- <b>Export control block Driver_USBH#</b>: Specifies the exported driver control block number.
- <b>EHCI Registers base address</b>: Specifies the absolute address at which EHCI controller registers are located.
- <b>Relocate EHCI Communication Area</b>: Specifies if the communication area is located at a specific address (via the linker script):
- <b>Section name</b>: Specifies the section name of the EHCI communication area (for positioning via the linker script).
- <b>Locate EHCI Communication Area</b>: Specifies if the communication area is located in a specific memory (via the linker script):
- <b>Section name</b>: Specifies the section name for the EHCI communication area (for positioning via the linker script).

- <b>USB Host Controller 1</b> (can be enabled/disabled):
- <b>Export control block Driver_USBH#</b>: Specifies the exported driver control block number.
- <b>EHCI Registers base address</b>: Specifies the absolute address at which EHCI controller registers are located.
- <b>Relocate EHCI Communication Area</b>: Specifies if the communication area is located at a specific address (via the linker script):
- <b>Section name</b>: Specifies the section name of the EHCI communication area (for positioning via the linker script).
- <b>Locate EHCI Communication Area</b>: Specifies if the communication area is located in a specific memory (via the linker script):
- <b>Section name</b>: Specifies the section name for the EHCI communication area (for positioning via the linker script).

- <b>Maximum number of Pipes (per controller)</b>: Specifies the maximum number of pipes that the driver will support (per controller).

Expand All @@ -228,14 +228,14 @@ It is configured via define values in the <b>USBH_OHCI_Config.h</b> configuratio
- <b>USB Host Controller 0</b>:
- <b>Export control block Driver_USBH#</b>: Specifies the exported driver control block number.
- <b>OHCI Registers base address</b>: Specifies the absolute address at which OHCI controller registers are located.
- <b>Relocate OHCI Communication Area (HCCA)</b>: Specifies if the communication area is located at a specific address (via the linker script):
- <b>Section name</b>: Specifies the section name of the OHCI communication area (for positioning via the linker script).
- <b>Locate OHCI Communication Area (HCCA)</b>: Specifies if the communication area is located in a specific memory (via the linker script):
- <b>Section name</b>: Specifies the section name for the OHCI communication area (for positioning via the linker script).

- <b>USB Host Controller 1</b> (can be enabled/disabled):
- <b>Export control block Driver_USBH#</b>: Specifies the exported driver control block number.
- <b>OHCI Registers base address</b>: Specifies the absolute address at which OHCI controller registers are located.
- <b>Relocate OHCI Communication Area (HCCA)</b>: Specifies if the communication area is located at a specific address (via the linker script):
- <b>Section name</b>: Specifies the section name of the OHCI communication area (for positioning via the linker script).
- <b>Locate OHCI Communication Area (HCCA)</b>: Specifies if the communication area is located in a specific memory (via the linker script):
- <b>Section name</b>: Specifies the section name for the OHCI communication area (for positioning via the linker script).

- <b>Maximum number of Pipes (per controller)</b>: Specifies the maximum number of pipes that the driver will support (per controller).
*/
Expand Down Expand Up @@ -289,7 +289,7 @@ The \ref driver_pack_content provides implementations of <a href="https://arm-so

The documentation for the Renesas DA16200 can be found here: https://www.renesas.com/eu/en/products/interface-connectivity/wireless-communications/wi-fi/da16200-ultra-low-power-wi-fi-soc-battery-powered-iot-devices

DA16200 FreeRTOS SDK Firmware Image v3.2.3.0 (or newer) is required. Firmware image and programing instructions "DA16200 DA16600 FreeRTOS Getting Started Guide" are also available on the above web site.
DA16200 FreeRTOS SDK Firmware Image v3.2.3.0 (or newer) is required. Firmware image and programming instructions "DA16200 DA16600 FreeRTOS Getting Started Guide" are also available on the above web site.

\subsection driver_ESP32 ESP32

Expand Down Expand Up @@ -326,7 +326,7 @@ flashed with the firmware for UART communication. To enable SPI communication, f
- In the es-WiFi Demo application, execute:
- Go to <b>Setup - Serial Port - Configure/Open</b>:
\image html ISM43362_set_COM_port_conf.png
- Check the follwoing settings (Serial Port being the one added just now):
- Check the following settings (Serial Port being the one added just now):
\image html ISM43362_set_COM_port.png
- Go to <b>Menu - Firmware - Update</b>:
\image html ISM43362_update_firmware.png
Expand Down
18 changes: 9 additions & 9 deletions USB/EHCI/Config/USBH_EHCI_Config.h
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Expand Up @@ -17,7 +17,7 @@
*
* -----------------------------------------------------------------------------
*
* $Date: 27. May 2024
* $Date: 4. July 2024
* $Revision: V1.0
*
* Project: USB Host EHCI Controller Driver Configuration definitions
Expand All @@ -40,13 +40,13 @@
// <i>Specifies the absolute address at which EHCI controller registers are located
#define USBH0_EHCI_BASE_ADDR 0x402E0100

// <e>Relocate EHCI Communication Area
// <i>Specifies if the communication area is located at a specific address
// <e>Locate EHCI Communication Area
// <i>Specifies if the communication area is located in a specific memory
// <i>(via the linker script)
#define USBH0_EHCI_COM_AREA_RELOC 0
#define USBH0_EHCI_COM_AREA_LOCATE 0

// <s.64>Section name
// <i>Specifies the section name of the EHCI communication area
// <i>Specifies the section name for the EHCI communication area
// <i>(for positioning via the linker script)
#define USBH0_EHCI_COM_AREA_SECTION_NAME ".driver.usbh0.ehci_com_area"
// </e>
Expand All @@ -65,13 +65,13 @@
// <i>Specifies the absolute address at which EHCI controller registers are located
#define USBH1_EHCI_BASE_ADDR 0x402E0300

// <e>Relocate EHCI Communication Area
// <i>Specifies if the communication area is located at a specific address
// <e>Locate EHCI Communication Area
// <i>Specifies if the communication area is located in a specific memory
// <i>(via the linker script)
#define USBH1_EHCI_COM_AREA_RELOC 0
#define USBH1_EHCI_COM_AREA_LOCATE 0

// <s.64>Section name
// <i>Specifies the section name of the EHCI communication area
// <i>Specifies the section name for the EHCI communication area
// <i>(for positioning via the linker script)
#define USBH1_EHCI_COM_AREA_SECTION_NAME ".driver.usbh1.ehci_com_area"
// </e>
Expand Down
120 changes: 60 additions & 60 deletions USB/EHCI/Interface/USBH_EHCI_HW.h
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@@ -1,70 +1,70 @@
/*
* Copyright (c) 2024 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* -----------------------------------------------------------------------------
*
* $Date: 28. May 2024
* $Revision: V1.0
*
* Project: USB Host EHCI Controller Driver Hardware-specific header
* $Date: 28. May 2024
* $Revision: V1.0
*
* -----------------------------------------------------------------------------
*/

#ifndef USBH_EHCI_HW_H_
#define USBH_EHCI_HW_H_

#include <stdint.h>
* Project: USB Host EHCI Controller Driver Hardware-specific header
*
* -----------------------------------------------------------------------------
*/

#ifndef USBH_EHCI_HW_H_
#define USBH_EHCI_HW_H_

#include <stdint.h>

#ifdef __cplusplus
extern "C"
{
#endif
typedef void (*USBH_EHCI_Interrupt_t) (void); ///< Pointer to EHCI Interrupt Handler Routine.
/**
\fn int32_t USBH_EHCI_HW_Initialize (uint8_t ctrl, USBH_EHCI_Interrupt_t interrupt_handler)
\brief Initialize USB Host EHCI Interface.
\param[in] ctrl Index of USB Host controller
\param[in] interrupt_handler Pointer to Interrupt Handler Routine
\return 0 on success, -1 on error.
*/
extern int32_t USBH_EHCI_HW_Initialize (uint8_t ctrl, USBH_EHCI_Interrupt_t interrupt_handler);
/**
\fn int32_t USBH_EHCI_HW_Uninitialize (uint8_t ctrl)
\brief De-initialize USB Host EHCI Interface.
\param[in] ctrl Index of USB Host controller
\return 0 on success, -1 on error.
*/
extern int32_t USBH_EHCI_HW_Uninitialize (uint8_t ctrl);
/**
\fn int32_t USBH_EHCI_HW_PowerControl (uint8_t ctrl, uint32_t state)
\brief Control USB Host EHCI Interface Power.
\param[in] ctrl Index of USB Host controller
\param[in] state Power state (0 = power off, 1 = power on)
\return 0 on success, -1 on error.
*/
extern int32_t USBH_EHCI_HW_PowerControl (uint8_t ctrl, uint32_t state);
#ifdef __cplusplus
}
#endif
#endif /* USBH_EHCI_HW_H_ */

typedef void (*USBH_EHCI_Interrupt_t) (void); ///< Pointer to EHCI Interrupt Handler Routine.

/**
\fn int32_t USBH_EHCI_HW_Initialize (uint8_t ctrl, USBH_EHCI_Interrupt_t interrupt_handler)
\brief Initialize USB Host EHCI Interface.
\param[in] ctrl Index of USB Host controller
\param[in] interrupt_handler Pointer to Interrupt Handler Routine
\return 0 on success, -1 on error.
*/
extern int32_t USBH_EHCI_HW_Initialize (uint8_t ctrl, USBH_EHCI_Interrupt_t interrupt_handler);

/**
\fn int32_t USBH_EHCI_HW_Uninitialize (uint8_t ctrl)
\brief De-initialize USB Host EHCI Interface.
\param[in] ctrl Index of USB Host controller
\return 0 on success, -1 on error.
*/
extern int32_t USBH_EHCI_HW_Uninitialize (uint8_t ctrl);

/**
\fn int32_t USBH_EHCI_HW_PowerControl (uint8_t ctrl, uint32_t state)
\brief Control USB Host EHCI Interface Power.
\param[in] ctrl Index of USB Host controller
\param[in] state Power state (0 = power off, 1 = power on)
\return 0 on success, -1 on error.
*/
extern int32_t USBH_EHCI_HW_PowerControl (uint8_t ctrl, uint32_t state);

#ifdef __cplusplus
}
#endif

#endif /* USBH_EHCI_HW_H_ */
68 changes: 34 additions & 34 deletions USB/EHCI/Source/USBH_EHCI_TT.c
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Expand Up @@ -17,15 +17,15 @@
*
* -----------------------------------------------------------------------------
*
* $Date: 28. May 2024
* $Revision: V1.0
* $Date: 4. July 2024
* $Revision: V1.0
*
* Project: USB Host EHCI Controller Driver
* for customized EHCI with internal Transaction Translator (TT)
* (with full/low speed support)
*
* -----------------------------------------------------------------------------
*/
*
* -----------------------------------------------------------------------------
*/

/* History:
* Version 1.0
Expand Down Expand Up @@ -85,21 +85,21 @@ static ARM_USBH_CAPABILITIES usbh_driver_capabilities[USBH_EHCI_TT_INSTANCES] =

// Macros

#define USBHn_EHCI_COM_AREA_SECTION_(x) __attribute__((section(x)))
#if (USBH0_EHCI_COM_AREA_RELOC == 1)
#define USBH0_EHCI_COM_AREA_SECTION(x) USBHn_EHCI_COM_AREA_SECTION_(x)
#else
#define USBH0_EHCI_COM_AREA_SECTION(x)
#endif
#if (USBH1_EHCI_ENABLED == 1)
#if (USBH1_EHCI_COM_AREA_RELOC == 1)
#define USBH1_EHCI_COM_AREA_SECTION(x) USBHn_EHCI_COM_AREA_SECTION_(x)
#else
#define USBH1_EHCI_COM_AREA_SECTION(x)
#endif
#endif
#define USBHn_EHCI_COM_AREA_SECTION_(x) __attribute__((section(x)))

#if (USBH0_EHCI_COM_AREA_LOCATE == 1)
#define USBH0_EHCI_COM_AREA_SECTION(x) USBHn_EHCI_COM_AREA_SECTION_(x)
#else
#define USBH0_EHCI_COM_AREA_SECTION(x)
#endif

#if (USBH1_EHCI_ENABLED == 1)
#if (USBH1_EHCI_COM_AREA_LOCATE == 1)
#define USBH1_EHCI_COM_AREA_SECTION(x) USBHn_EHCI_COM_AREA_SECTION_(x)
#else
#define USBH1_EHCI_COM_AREA_SECTION(x)
#endif
#endif

#ifndef USBH_EHCI_MEM_PFL_SIZE
#define USBH_EHCI_MEM_PFL_SIZE (4096U)
Expand Down Expand Up @@ -192,7 +192,7 @@ static const USBH_EHCI_t usbh0_ehci = { USBH0_EHCI_DRV_NUM,
&usbh0_ehci_com_area.sitd[0],
NULL,
&usbh0_transfer_info[0],
&usbh0_pipe_evt_info,
&usbh0_pipe_evt_info,
Driver_USBH0_IRQ_Handler
};

Expand Down Expand Up @@ -292,26 +292,26 @@ static void USBH_EHCI_IOC (uint32_t *ptr_pfl_entry) {
ptr_curr = (USBH_EHCI_COMMON *)(*ptr_pfl_entry & (~0x1FU));

// Process all isochronous (siTDs) first
while ((ptr_curr->DW0.LinkPtr != 0U) &&
(ptr_curr->DW0.Typ == USBH_EHCI_ELEMENT_TYPE_siTD) &&
while ((ptr_curr->DW0.LinkPtr != 0U) &&
(ptr_curr->DW0.Typ == USBH_EHCI_ELEMENT_TYPE_siTD) &&
(ptr_curr->DW0.T == 0U)) {
((USBH_EHCI_siTD *)ptr_curr)->DW3.IOC = 0U; // Clear IOC (for current siTD)
ptr_curr = (USBH_EHCI_COMMON *)(ptr_curr->DW0.LinkPtr << 5);
}

if ((ptr_curr->DW0.LinkPtr != 0U) &&
(ptr_curr->DW0.Typ == USBH_EHCI_ELEMENT_TYPE_qH) &&
if ((ptr_curr->DW0.LinkPtr != 0U) &&
(ptr_curr->DW0.Typ == USBH_EHCI_ELEMENT_TYPE_qH) &&
(ptr_curr->DW0.T == 0U)) {
// Process all interrupt (qH)
do {
ptr_int_td = ptr_curr;
while ((ptr_int_td->DW0.LinkPtr != 0U) &&
while ((ptr_int_td->DW0.LinkPtr != 0U) &&
(ptr_int_td->DW0.T == 0U)) {
((USBH_EHCI_qTD *)ptr_int_td)->DW2.IOC = 0U; // Clear IOC (for current qTD)
ptr_int_td = (USBH_EHCI_COMMON *)(ptr_int_td->DW0.LinkPtr << 5);
}
} while ((ptr_curr->DW0.LinkPtr != 0U) &&
(ptr_curr->DW0.Typ == USBH_EHCI_ELEMENT_TYPE_qH) &&
} while ((ptr_curr->DW0.LinkPtr != 0U) &&
(ptr_curr->DW0.Typ == USBH_EHCI_ELEMENT_TYPE_qH) &&
(ptr_curr->DW0.T == 0U));
((USBH_EHCI_siTD *)ptr_int_td)->DW3.IOC = 1U; // Set IOC (for last qTD)
} else {
Expand Down Expand Up @@ -342,7 +342,7 @@ static bool USBH_EHCI_StartStop (uint8_t ctrl, uint8_t type, bool start) {
} else { // Periodic type
msk = (1UL << 4);
}

// Wait for status = command (max 1 second)
for (tout = 10100U; ; tout-- ){
usbcmd = usbh_ehci_reg_ptr[ctrl]->USBCMD;
Expand Down Expand Up @@ -519,7 +519,7 @@ static USBH_EHCI_qTD *USBH_EHCI_qTD_GetNext_qH (const USBH_EHCI_qH *ptr_qH) {
*/
static bool USBH_EHCI_qTD_IsLinkedIn_qH (const USBH_EHCI_qH *ptr_qH, const USBH_EHCI_qTD *ptr_qTD) {
USBH_EHCI_qTD *ptr_curr_qTD;

if (ptr_qH == NULL) { return NULL; }
if (ptr_qTD == NULL) { return NULL; }

Expand Down Expand Up @@ -772,14 +772,14 @@ static bool USBH_EHCI_IsoTransferActivate (uint8_t ctrl, USBH_TransferInfo_t *pt
ptr_TI->iso_last_frame_index = pfl_index;
ptr_TI->iso_frame_index[ti_index] = pfl_index;

// Insert siTD into PFL, if entry already exists append this new transfer to
// Insert siTD into PFL, if entry already exists append this new transfer to
// last existing isochronous transfer
if (((*ptr_uint32_t & 0x1FU) == 4U) && // If T bit is 0 and Type is siTD, meaning it is valid entry
((*ptr_uint32_t & (~0x1FU)) != 0U)) { // and if NextLinkPointer is != 0
// Find last iso entry and add new one behind it
ptr_curr_siTD = (USBH_EHCI_siTD *)(*ptr_uint32_t & ~0x1FU);
while ((ptr_curr_siTD->DW0.NextLinkPtr != 0U) &&
(ptr_curr_siTD->DW0.Typ == USBH_EHCI_ELEMENT_TYPE_siTD) &&
while ((ptr_curr_siTD->DW0.NextLinkPtr != 0U) &&
(ptr_curr_siTD->DW0.Typ == USBH_EHCI_ELEMENT_TYPE_siTD) &&
(ptr_curr_siTD->DW0.T == 0U)) {
ptr_curr_siTD = (USBH_EHCI_siTD *)(ptr_curr_siTD->DW0.NextLinkPtr << 5);
}
Expand Down Expand Up @@ -2661,7 +2661,7 @@ static void USBH_HW_IRQ_Handler (uint8_t ctrl) {
status = ptr_qTD->DW2.Status;
transferred = ptr_TI->num_to_transfer - ptr_qTD->DW2.TBT;
ptr_TI->num_transferred_total += transferred;
if (((status & (1UL << 7)) == 0U) &&
if (((status & (1UL << 7)) == 0U) &&
((status & (1UL << 6)) == 0U)) { // No Error
if (ptr_TI->num == ptr_TI->num_transferred_total) { // All data was transferred
ep_event = ARM_USBH_EVENT_TRANSFER_COMPLETE;
Expand Down
4 changes: 2 additions & 2 deletions USB/EHCI/Source/USBH_EHCI_TT.h
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Expand Up @@ -17,8 +17,8 @@
*
* -----------------------------------------------------------------------------
*
* $Date: 28. May 2024
* $Revision: V1.0
* $Date: 28. May 2024
* $Revision: V1.0
*
* Project: USB Host EHCI Controller Driver header
* for customized EHCI with internal Transaction Translator (TT)
Expand Down
4 changes: 2 additions & 2 deletions USB/EHCI/Source/USBH_EHCI_TT_Regs.h
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Expand Up @@ -17,8 +17,8 @@
*
* -----------------------------------------------------------------------------
*
* $Date: 28. May 2024
* $Revision: V1.0
* $Date: 28. May 2024
* $Revision: V1.0
*
* Project: USB Host EHCI Controller Driver Registers header
* for customized EHCI with internal Transaction Translator (TT)
Expand Down
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