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add spi device node for hi3660 #21

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add spi device node for hi3660 #21

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45 changes: 45 additions & 0 deletions arch/arm64/boot/dts/hisilicon/hi3660.dtsi
100755 → 100644
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Original file line number Diff line number Diff line change
Expand Up @@ -543,6 +543,51 @@
status = "disabled";
};

spi1: spi@fdf08000 {
compatible = "arm,pl022", "arm,primecell";
reg = <0x0 0xfdf08000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 80 4>;
clocks = <&crg_ctrl HI3660_CLK_GATE_SPI1>;
clock-names = "apb_pclk";
pinctrl-names = "default";
pinctrl-0 = <&spi1_pmx_func>;
num-cs = <1>;
cs-gpios = <&gpio2 2 0>;
status = "disabled";
};

spi3: spi@ff3b3000 {
compatible = "arm,pl022", "arm,primecell";
reg = <0x0 0xff3b3000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 312 4>;
clocks = <&crg_ctrl HI3660_CLK_GATE_SPI3>;
clock-names = "apb_pclk";
pinctrl-names = "default";
pinctrl-0 = <&spi3_pmx_func>;
num-cs = <1>;
cs-gpios = <&gpio18 5 0>;
status = "disabled";
};

spi4: spi@fdf06000 {
compatible = "arm,pl022", "arm,primecell";
reg = <0x0 0xfdf06000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 313 4>;
clocks = <&crg_ctrl HI3660_CLK_GATE_SPI4>;
clock-names = "apb_pclk";
pinctrl-names = "default";
pinctrl-0 = <&spi4_pmx_func>;
num-cs = <1>;
cs-gpios = <&gpio27 2 0>;
status = "disabled";
};

gpio0: gpio@e8a0b000 {
compatible = "arm,pl061", "arm,primecell", "arm,primecell0";
reg = <0 0xe8a0b000 0 0x1000>;
Expand Down
27 changes: 27 additions & 0 deletions arch/arm64/boot/dts/hisilicon/hikey960-pinctrl.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -48,6 +48,15 @@
0x120 MUX_M0 /* GPIO_074 (IOMG_072) */
>;
};

spi1_pmx_func: spi1_pmx_func {
pinctrl-single,pins = <
0x034 MUX_M1 /* SPI1_CLK (IOMG_013) */
0x038 MUX_M1 /* SPI1_DI (IOMG_014) */
0x03C MUX_M1 /* SPI1_DO (IOMG_015) */
0x040 MUX_M1 /* SPI1_CS_N (IOMG_016) */
>;
};
};

/* [IOMG_MMC0_000, IOMG_MMC0_005] */
Expand Down Expand Up @@ -81,6 +90,15 @@
pinctrl-single,function-mask = <0x7>;
/* pin base, nr pins & gpio function */
pinctrl-single,gpio-range = <&range 0 12 0>;

spi3_pmx_func: spi3_pmx_func {
pinctrl-single,pins = <
0x008 MUX_M1 /* SPI3_CLK (IOMG_FIX_002) */
0x00C MUX_M1 /* SPI3_DI (IOMG_FIX_003) */
0x010 MUX_M1 /* SPI3_DO (IOMG_FIX_004) */
0x014 MUX_M1 /* SPI3_CS0_N (IOMG_FIX_005) */
>;
};
};

/* [IOMG_MMC1_000, IOMG_MMC1_005] */
Expand Down Expand Up @@ -141,6 +159,15 @@
0x028 MUX_M3 /* I2C7_SDA (IOMG_AO_010) */
>;
};

spi4_pmx_func: spi4_pmx_func {
pinctrl-single,pins = <
0x08C MUX_M4 /* SPI4_CLK (IOMG_AO_035) */
0x090 MUX_M4 /* SPI4_DI (IOMG_AO_036) */
0x094 MUX_M4 /* SPI4_DO (IOMG_AO_037) */
0x098 MUX_M4 /* SPI4_CS0_N (IOMG_AO_038)*/
>;
};
};
};
};