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boards: arm: GD32F450I-EVAL: add initial support #39958

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merged 12 commits into from
Nov 18, 2021

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@gmarull gmarull commented Nov 1, 2021

This PR adds initial support for the GD32F450I-EVAL board. It also includes some refactoring to the hal_gigadevice module and SoC/dts organization to accommodate addition of new series. Each commit contains more information/details on the changes performed.

Note: I'll open a separate PR for the pinctrl driver, for now, the board has a custom init function.

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github-actions bot commented Nov 1, 2021

The following west manifest projects have been modified in this Pull Request:

Name Old Revision New Revision Diff
hal_gigadevice zephyrproject-rtos/hal_gigadevice@ce323de zephyrproject-rtos/hal_gigadevice@85f10a6 (main) zephyrproject-rtos/hal_gigadevice@ce323de9..85f10a63

Note: This message is automatically posted and updated by the Manifest GitHub Action.

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Hi @gmarull ,

Just a few comments.

dts/arm/gigadevice/gd32f4xx/gd32f450ik.dtsi Outdated Show resolved Hide resolved
dts/arm/gigadevice/gd32f4xx/gd32f4xx.dtsi Outdated Show resolved Hide resolved
soc/arm/gigadevice/gd32f4xx/soc.h Show resolved Hide resolved
boards/arm/gd32f450i_eval/gd32f450i_eval.yaml Outdated Show resolved Hide resolved
boards/arm/gd32f450i_eval/support/openocd.cfg Show resolved Hide resolved
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@nandojve nandojve left a comment

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LGTM !

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@cameled cameled left a comment

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LGTM.

Despite the "F4" prefix, GD32F403 is an SoC with significant differences
compared to other F4 MCUs:

- It has a completely different HAL
- It has significant hardware differences, for example, the pinctrl
  mechanism uses AFIO (all others use AF)

The grouping principles applied to other similar vendors such as ST
can't be applied for GD32 due to these reasons, so the approach taken
here is to define series based on the used HAL. A different HAL likely
means that there are significant hardware differences between, e.g. F403
and F405. The vendor likely chose a confusing naming scheme, but we need
to deal with it.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
There is no need to specify SoC suffixes, so simplify the selection.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
- Remove unnecessary include guard
- Fix comments

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Adjust CMake according to latest SoC changes.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Create a folder for each of the series.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Update hal_gigadevice, required to make F4XX HAL available.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
GD32F4XX requires access to SoC definitions (e.g. GD32F450) when
including library header files, so expose them at Zephyr level.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Add missing drivers included in F4XX HAL:

- DCI
- IPA
- IREF
- SYSCFG
- TLI
- TRNG

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Add initial support for GD32F4XX (405, 407 and 450).

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Add support for the IK variant (256K SRAM, 3072K ROM).

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
@github-actions github-actions bot removed the DNM This PR should not be merged (Do Not Merge) label Nov 14, 2021
Add support for the F4XX series.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Add initial support for the GD32F450I-EVAL board.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
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@carlescufi carlescufi left a comment

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LGTM

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@martinjaeger martinjaeger left a comment

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PR looks good. Haven't worked with this particular MCU series, though, and I didn't double-check with the reference manual.

@carlescufi carlescufi merged commit db030c2 into zephyrproject-rtos:main Nov 18, 2021
@gmarull gmarull deleted the gd32f450 branch November 18, 2021 16:54
@str4t0m str4t0m added the platform: GD32 GigaDevice label Aug 26, 2022
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6 participants