boards: nxp: lpcxpresso55s16: Combine SRAMs 0-2

Combine into single memory region to enable larger data needs.

Signed-off-by: Derek Snell <derek.snell@nxp.com>

Author: DerekSnell

boards/nxp/lpcxpresso55s16/lpcxpresso55s16.dts

@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk>
+ * Copyright 2024, NXP
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -14,6 +15,15 @@
 	compatible = "nxp,lpc55xxx", "nxp,lpc";
 };
 
+/*
+ * Default for this board is to allocate SRAM0-2 for data.  But the
+ * application can have an application specific device tree to
+ * allocate the SRAMs differently.
+ */
+&sram0 {
+	reg = <0x20000000 DT_SIZE_K(64)>;
+};
+
 zephyr_udc0: &usbhs {
 	status = "okay";
 };