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boards: arduino_due: Added DTS to the Arduino Due.
Change-Id: I006f9d4080a1351534ede5cc601e43526c39aa83 Origin: Original Signed-off-by: Justin Watson <jwatson5@gmail.com>
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7 files changed

+100
-29
lines changed

7 files changed

+100
-29
lines changed

arch/arm/soc/atmel_sam/sam3x/Kconfig.defconfig.series

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@@ -16,10 +16,6 @@ config SOC_PART_NUMBER
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string
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default sam3x8e if SOC_PART_NUMBER_SAM3X8E
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config NUM_IRQ_PRIO_BITS
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int
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default 3
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#
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# SAM3 family has total 45 peripherals capable of
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# generating interrupts.
@@ -32,29 +28,4 @@ config SYS_CLOCK_HW_CYCLES_PER_SEC
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int
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default 84000000
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#
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# SRAM address depends on the processor.
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#
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# SAM3X8E has two SRAM banks:
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# 64K @ 0x20000000
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# 32K @ 0x20080000
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# The first 64K is mirrored at 0x20070000
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# to provide one continuous 96K block.
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#
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config SRAM_SIZE
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default 96 if SOC_PART_NUMBER_SAM3X8E
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config SRAM_BASE_ADDRESS
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default 0x20000000 if !SOC_PART_NUMBER_SAM3X8E
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default 0x20070000 if SOC_PART_NUMBER_SAM3X8E
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#
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# Atmel SAM3X family has flash starting @ 0x00080000.
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#
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config FLASH_SIZE
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default 512 if SOC_PART_NUMBER_SAM3X8E
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config FLASH_BASE_ADDRESS
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default 0x00080000
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endif # SOC_SERIES_SAM3X

boards/arm/arduino_due/arduino_due_defconfig

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@@ -11,3 +11,4 @@ CONFIG_UART_ATMEL_SAM3=y
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CONFIG_SOC_ATMEL_SAM3X_EXT_MAINCK=y
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CONFIG_PINMUX=y
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CONFIG_WATCHDOG=n
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CONFIG_HAS_DTS=y

dts/arm/Makefile

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@@ -29,6 +29,7 @@ dtb-$(CONFIG_BOARD_NRF51_BLENANO) = nrf51_blenano.dts_compiled
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dtb-$(CONFIG_BOARD_NRF51_PCA10028) = nrf51_pca10028.dts_compiled
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dtb-$(CONFIG_BOARD_QUARK_SE_C1000_BLE) = quark_se_c1000_ble.dts_compiled
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dtb-$(CONFIG_BOARD_QEMU_CORTEX_M3) = qemu_cortex_m3.dts_compiled
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dtb-$(CONFIG_BOARD_ARDUINO_DUE) = arduino_due.dts_compiled
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always := $(dtb-y)
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endif

dts/arm/arduino_due.dts

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/dts-v1/;
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#include <atmel/sam3x.dtsi>
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/ {
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model = "Arduino Due with an Atmel SAM3X8E SoC";
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compatible = "arduino,due", "atmel,sam3x8e", "atmel,sam3x";
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aliases {
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uart_0 = &uart0;
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};
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chosen {
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zephyr,sram = &sram0;
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zephyr,flash = &flash0;
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};
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};
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&uart0 {
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status = "ok";
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current-speed = <115200>;
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};

dts/arm/arduino_due.fixup

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/* This file is a temporary workaround for mapping of the generated information
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* to the current driver definitions. This will be removed when the drivers
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* are modified to handle the generated information, or the mapping of
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* generated data matches the driver definitions.
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*/
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#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS

dts/arm/atmel/sam3x.dtsi

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/*
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* Copyright (c) 2017 Justin Watson
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm/armv7-m.dtsi>
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/ {
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cpus {
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cpu@0 {
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compatible = "arm,cortex-m4";
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};
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};
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sram0: memory {
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compatible = "sram";
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reg = <0x20070000 0x18000>;
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};
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flash0: flash {
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compatible = "flash";
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reg = <0x00080000 0x80000>;
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};
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soc {
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uart0: uart@400E0800 {
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compatible = "atmel,sam3x-uart";
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reg = <0x400E0800 0x124>;
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interrupts = <8 0>;
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status = "disabled";
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <3>;
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};

dts/arm/yaml/atmel,sam3x-uart.yaml

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---
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title: SAM3X UART
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id: atmel,sam3x-uart
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version: 0.1
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description: >
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This binding gives a base representation of the SAM3X UART
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inherits:
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- !include uart.yaml
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properties:
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- compatible:
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type: string
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category: required
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description: compatible strings
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constraint: "atmel,sam3x-uart"
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- reg:
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type: array
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description: mmio register space
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generation: define
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category: required
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- interrupts:
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type: array
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category: required
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description: required interrupts
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generation: define
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...

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