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boards: riscv: Add support for WCH CH32V307V-EVT-R1 board
Add a basic support for WCH CH32V307V-EVT-R1. Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
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# Copyright (c) 2022 TOKITA Hiroshi <tokita.hiroshi@gmail.com>
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_CH32V307V_EVT_R1
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bool "WCH CH32V307V_EVT_R1"
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depends on SOC_CH32V307
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# WCH CH32V307V_EVT_R1 Board Configuration
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# Copyright (c) 2022 TOKITA Hiroshi <tokita.hiroshi@gmail.com>
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if BOARD_CH32V307V_EVT_R1
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config BOARD
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default "ch32v307v_evt_r1" if BOARD_CH32V307V_EVT_R1
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endif # BOARD_CH32V307V_EVT_R1
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# Copyright (c) 2022 TOKITA Hiroshi <tokita.hiroshi@gmail.com>
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# SPDX-License-Identifier: Apache-2.0
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# It seems the 'reset run' command make flash failure.
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# Call 'reset halt', 'resume', and 'shutdown' before
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# 'reset run' to workarounds.
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board_runner_args(openocd "--cmd-post-verify=ch32v307v-shutdown")
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
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/*
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* Copyright (c) 2022 TOKITA Hiroshi
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <dt-bindings/pinctrl/ch32v30xxx-pinctrl.h>
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&pinctrl {
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usart1_default: usart1_default {
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group1 {
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pinmux = <USART1_TX_PA9_NORMP>, <USART1_RX_PA10_NORMP>;
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};
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};
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};
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/*
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* Copyright (c) 2022 TOKITA Hiroshi <tokita.hiroshi@gmail.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <wch/ch32v307x.dtsi>
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#include "ch32v307v_evt_r1-pinctrl.dtsi"
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/ {
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model = "WCH CH32V307V_EVT_R1";
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compatible = "wch,ch32v307v_evt_r1";
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chosen {
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zephyr,console = &usart1;
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zephyr,shell-uart = &usart1;
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zephyr,sram = &sram0;
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zephyr,flash = &flash0;
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};
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leds {
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compatible = "gpio-leds";
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/*
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* LED1 and LED2 exists on J3 connector.
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* But the pin not connecting to any GPIO pins,
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* you need to connect LED1 pin to any GPIO pin.
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* This configuration is assuming that LED1 is
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* connected to PB13, which corresponding to
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* the Arduino's LED pin.
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*/
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led1: led1 {
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gpios = <&gpiob 13 GPIO_ACTIVE_HIGH>;
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label = "LED1";
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};
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};
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aliases {
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led0 = &led1;
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};
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};
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&usart1 {
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status = "okay";
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current-speed = <115200>;
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pinctrl-0 = <&usart1_default>;
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pinctrl-names = "default";
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};
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&gpiob {
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status = "okay";
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};
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identifier: ch32v307v_evt_r1
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name: ch32v307v_evt_r1
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type: mcu
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arch: riscv32
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toolchain:
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- zephyr
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- xtools
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flash: 256
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ram: 64
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# WCH CH32V307V_EVT_R1 Board Configuration
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#
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# Copyright (c) 2022 TOKITA Hiroshi <tokita.hiroshi@gmail.com>
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#
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# SPDX-License-Identifier: Apache-2.0
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CONFIG_SOC_SERIES_CH32V30X=y
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CONFIG_SOC_CH32V307=y
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CONFIG_BOARD_CH32V307V_EVT_R1=y
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CONFIG_SERIAL=y
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CONFIG_UART_INTERRUPT_DRIVEN=n
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_GPIO=y
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.. _ch32v307v_evt_r1:
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WCH CH32V307V EVT R1
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####################
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.. image:: img/ch32v307v_evt_r1.jpg
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:align: center
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:alt: ch32v307v_evt_r1
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Overview
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********
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The WCH CH32V307V-EVT-R1 is a fully-featured development board.
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The board has FPU supported RISC-V processor, USB, Ethernet,
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and various and many basic peripherals.
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- `CH32V307V Page <http://www.wch-ic.com/products/CH32V307.html?>`_
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- `CH32V307V Datasheet Download Page <http://www.wch-ic.com/downloads/CH32V20x_30xDS0_PDF.html>`_
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- `CH32V307V Reference Manual Download Page <http://www.wch-ic.com/downloads/CH32FV2x_V3xRM_PDF.html>`_
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- `QingKe V4 Processor Manual Download Page (Chinese) <https://www.wch.cn/downloads/QingKeV4_Processor_Manual_PDF.html>`_
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- `GitHub Page (Firmware, board schematics, ...) <https://github.com/openwch/ch32v307>`_
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Hardware
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********
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- FPU supported 144MHz RISC-V processor
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- 64KB SRAM/256KB Flash
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- 80 x I/O ports
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- 3 x USART, 5 x UART
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- 2 x ADC(16 channel)
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- 2 x I2C
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- 3 x SPI
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- 2 x I2S
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- 2 x CAN
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- 2 x 12-bit DAC
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- 2 x basic 16-bit timer
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- 4 x universal 16-bit timer
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- 4 x advanced 16-bit timer
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- 1 x RTC
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- 1 x SysTick
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- 2 x Watchdog timer
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- 2 x DMA
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- 4 x Applifier
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- 1 x True random number generator
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- 1 x Digital Video Port
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- 1 x SDIO
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- 1 x USBFS(OTG)
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- 1 x USBHS
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- 1 x ETH(Gigabit Ethernet controller)
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Supported Features
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==================
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The board configuration supports the following hardware features:
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.. list-table::
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:header-rows: 1
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* - Peripheral
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- Kconfig option
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- Devicetree compatible
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* - WCH QingKe SysTick
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- :kconfig:option:`CONFIG_WCH_QINGKE_SYSTICK`
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- :dtcompatible:`wch,qingke-systick`
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* - WCH PFIC Interrupt Controller
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- :kconfig:option:`CONFIG_WCH_PFIC`
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- :dtcompatible:`wch,pfic`
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* - GPIO
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- :kconfig:option:`CONFIG_GPIO`
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- :dtcompatible:`gd,gd32-gpio`
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* - USART
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- :kconfig:option:`CONFIG_SERIAL`
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- :dtcompatible:`gd,gd32-usart`
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Serial Port
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===========
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The USART1 connects to the P9 USB connector via WCH-Link.
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Connect the USB connecter and launch a terminal application on your PC
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to show the UART message.
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Onboard LED
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===========
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The board has two onboard LEDs. But these are not connected to any GPIO pin.
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You need to connect the LED pin with any GPIO pin in connectors to light it.
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The default configuration uses PB13, the Arduino LED pin, as the LED pin.
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Programming and debugging
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*************************
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Building & Flashing
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===================
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You'll need OpenOCD with WCH CH32V series support to upload the application
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to the device. First, download the binaries for your OS from the
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`MounRiver Studio download page <http://mounriver.com/download>`_.
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(MounRiver Studio contains WCH CH32V supported OpenOCD binaries.)
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The Zephyr SDK uses a bundled version of OpenOCD by default. You can
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overwrite that behavior by adding the
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``-DOPENOCD=<path/to/riscv-openocd/bin/openocd>``
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parameter when building:
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Here is an example of building the :ref:`blinky-sample` application.
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.. zephyr-app-commands::
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:zephyr-app: samples/basic/blinky
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:board: ch32v307v_evt_r1
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:goals: build flash
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:gen-args: -DOPENOCD=<path/to/riscv-openocd/bin/openocd>
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Debugging
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=========
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You can debug an application in the usual way. Here is an example for the
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:ref:`blinky-sample` application.
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.. zephyr-app-commands::
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:zephyr-app: samples/basic/blinky
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:board: ch32v307v_evt_r1
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:maybe-skip-config:
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:goals: debug
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:gen-args: -DOPENOCD=<path/to/riscv-openocd/bin/openocd>
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# Copyright (c) 2022 TOKITA Hiroshi <tokita.hiroshi@gmail.com>
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# SPDX-License-Identifier: Apache-2.0
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adapter driver wlink
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wlink_set
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adapter speed 2000
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set _CHIPNAME riscv
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jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x00001
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME
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$_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME wch_riscv 0x00000000 0 0 0 $_TARGETNAME.0
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proc ch32v307v-shutdown {} {
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reset halt
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resume
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shutdown
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}

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