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nategraff-sifivenashif
nategraff-sifive
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nashif
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drivers: gpio: sifive: Fix GPIO extern interrupts
IRQ_CONNECT calls in the SiFive GPIO driver were misconfigured when the conversion to DeviceTree support occurred. Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>
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-33
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‎drivers/gpio/gpio_sifive.c‎

Lines changed: 33 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -358,7 +358,7 @@ static void gpio_sifive_cfg_0(void);
358358

359359
static const struct gpio_sifive_config gpio_sifive_config0 = {
360360
.gpio_base_addr = CONFIG_SIFIVE_GPIO_0_BASE_ADDR,
361-
.gpio_irq_base = CONFIG_SIFIVE_GPIO_0_IRQ_0,
361+
.gpio_irq_base = RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_0,
362362
.gpio_cfg_func = gpio_sifive_cfg_0,
363363
};
364364

@@ -373,224 +373,224 @@ DEVICE_AND_API_INIT(gpio_sifive_0, CONFIG_GPIO_SIFIVE_GPIO_NAME,
373373
static void gpio_sifive_cfg_0(void)
374374
{
375375
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_0
376-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_0,
376+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_0,
377377
CONFIG_GPIO_SIFIVE_0_PRIORITY,
378378
gpio_sifive_irq_handler,
379379
DEVICE_GET(gpio_sifive_0),
380380
0);
381381
#endif
382382
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_1
383-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_1,
383+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_1,
384384
CONFIG_GPIO_SIFIVE_1_PRIORITY,
385385
gpio_sifive_irq_handler,
386386
DEVICE_GET(gpio_sifive_0),
387387
0);
388388
#endif
389389
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_2
390-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_2,
390+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_2,
391391
CONFIG_GPIO_SIFIVE_2_PRIORITY,
392392
gpio_sifive_irq_handler,
393393
DEVICE_GET(gpio_sifive_0),
394394
0);
395395
#endif
396396
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_3
397-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_3,
397+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_3,
398398
CONFIG_GPIO_SIFIVE_3_PRIORITY,
399399
gpio_sifive_irq_handler,
400400
DEVICE_GET(gpio_sifive_0),
401401
0);
402402
#endif
403403
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_4
404-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_4,
404+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_4,
405405
CONFIG_GPIO_SIFIVE_4_PRIORITY,
406406
gpio_sifive_irq_handler,
407407
DEVICE_GET(gpio_sifive_0),
408408
0);
409409
#endif
410410
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_5
411-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_5,
411+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_5,
412412
CONFIG_GPIO_SIFIVE_5_PRIORITY,
413413
gpio_sifive_irq_handler,
414414
DEVICE_GET(gpio_sifive_0),
415415
0);
416416
#endif
417417
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_6
418-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_6,
418+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_6,
419419
CONFIG_GPIO_SIFIVE_6_PRIORITY,
420420
gpio_sifive_irq_handler,
421421
DEVICE_GET(gpio_sifive_0),
422422
0);
423423
#endif
424424
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_7
425-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_7,
425+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_7,
426426
CONFIG_GPIO_SIFIVE_7_PRIORITY,
427427
gpio_sifive_irq_handler,
428428
DEVICE_GET(gpio_sifive_0),
429429
0);
430430
#endif
431431
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_8
432-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_8,
432+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_8,
433433
CONFIG_GPIO_SIFIVE_8_PRIORITY,
434434
gpio_sifive_irq_handler,
435435
DEVICE_GET(gpio_sifive_0),
436436
0);
437437
#endif
438438
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_9
439-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_9,
439+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_9,
440440
CONFIG_GPIO_SIFIVE_9_PRIORITY,
441441
gpio_sifive_irq_handler,
442442
DEVICE_GET(gpio_sifive_0),
443443
0);
444444
#endif
445445
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_10
446-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_10,
446+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_10,
447447
CONFIG_GPIO_SIFIVE_10_PRIORITY,
448448
gpio_sifive_irq_handler,
449449
DEVICE_GET(gpio_sifive_0),
450450
0);
451451
#endif
452452
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_11
453-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_11,
453+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_11,
454454
CONFIG_GPIO_SIFIVE_11_PRIORITY,
455455
gpio_sifive_irq_handler,
456456
DEVICE_GET(gpio_sifive_0),
457457
0);
458458
#endif
459459
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_12
460-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_12,
460+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_12,
461461
CONFIG_GPIO_SIFIVE_12_PRIORITY,
462462
gpio_sifive_irq_handler,
463463
DEVICE_GET(gpio_sifive_0),
464464
0);
465465
#endif
466466
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_13
467-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_13,
467+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_13,
468468
CONFIG_GPIO_SIFIVE_13_PRIORITY,
469469
gpio_sifive_irq_handler,
470470
DEVICE_GET(gpio_sifive_0),
471471
0);
472472
#endif
473473
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_14
474-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_14,
474+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_14,
475475
CONFIG_GPIO_SIFIVE_14_PRIORITY,
476476
gpio_sifive_irq_handler,
477477
DEVICE_GET(gpio_sifive_0),
478478
0);
479479
#endif
480480
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_15
481-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_15,
481+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_15,
482482
CONFIG_GPIO_SIFIVE_15_PRIORITY,
483483
gpio_sifive_irq_handler,
484484
DEVICE_GET(gpio_sifive_0),
485485
0);
486486
#endif
487487
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_16
488-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_16,
488+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_16,
489489
CONFIG_GPIO_SIFIVE_16_PRIORITY,
490490
gpio_sifive_irq_handler,
491491
DEVICE_GET(gpio_sifive_0),
492492
0);
493493
#endif
494494
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_17
495-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_17,
495+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_17,
496496
CONFIG_GPIO_SIFIVE_17_PRIORITY,
497497
gpio_sifive_irq_handler,
498498
DEVICE_GET(gpio_sifive_0),
499499
0);
500500
#endif
501501
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_18
502-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_18,
502+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_18,
503503
CONFIG_GPIO_SIFIVE_18_PRIORITY,
504504
gpio_sifive_irq_handler,
505505
DEVICE_GET(gpio_sifive_0),
506506
0);
507507
#endif
508508
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_19
509-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_19,
509+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_19,
510510
CONFIG_GPIO_SIFIVE_19_PRIORITY,
511511
gpio_sifive_irq_handler,
512512
DEVICE_GET(gpio_sifive_0),
513513
0);
514514
#endif
515515
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_20
516-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_20,
516+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_20,
517517
CONFIG_GPIO_SIFIVE_20_PRIORITY,
518518
gpio_sifive_irq_handler,
519519
DEVICE_GET(gpio_sifive_0),
520520
0);
521521
#endif
522522
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_21
523-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_21,
523+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_21,
524524
CONFIG_GPIO_SIFIVE_21_PRIORITY,
525525
gpio_sifive_irq_handler,
526526
DEVICE_GET(gpio_sifive_0),
527527
0);
528528
#endif
529529
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_22
530-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_22,
530+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_22,
531531
CONFIG_GPIO_SIFIVE_22_PRIORITY,
532532
gpio_sifive_irq_handler,
533533
DEVICE_GET(gpio_sifive_0),
534534
0);
535535
#endif
536536
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_23
537-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_23,
537+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_23,
538538
CONFIG_GPIO_SIFIVE_23_PRIORITY,
539539
gpio_sifive_irq_handler,
540540
DEVICE_GET(gpio_sifive_0),
541541
0);
542542
#endif
543543
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_24
544-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_24,
544+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_24,
545545
CONFIG_GPIO_SIFIVE_24_PRIORITY,
546546
gpio_sifive_irq_handler,
547547
DEVICE_GET(gpio_sifive_0),
548548
0);
549549
#endif
550550
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_25
551-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_25,
551+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_25,
552552
CONFIG_GPIO_SIFIVE_25_PRIORITY,
553553
gpio_sifive_irq_handler,
554554
DEVICE_GET(gpio_sifive_0),
555555
0);
556556
#endif
557557
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_26
558-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_26,
558+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_26,
559559
CONFIG_GPIO_SIFIVE_26_PRIORITY,
560560
gpio_sifive_irq_handler,
561561
DEVICE_GET(gpio_sifive_0),
562562
0);
563563
#endif
564564
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_27
565-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_27,
565+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_27,
566566
CONFIG_GPIO_SIFIVE_27_PRIORITY,
567567
gpio_sifive_irq_handler,
568568
DEVICE_GET(gpio_sifive_0),
569569
0);
570570
#endif
571571
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_28
572-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_28,
572+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_28,
573573
CONFIG_GPIO_SIFIVE_28_PRIORITY,
574574
gpio_sifive_irq_handler,
575575
DEVICE_GET(gpio_sifive_0),
576576
0);
577577
#endif
578578
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_29
579-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_29,
579+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_29,
580580
CONFIG_GPIO_SIFIVE_29_PRIORITY,
581581
gpio_sifive_irq_handler,
582582
DEVICE_GET(gpio_sifive_0),
583583
0);
584584
#endif
585585
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_30
586-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_30,
586+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_30,
587587
CONFIG_GPIO_SIFIVE_30_PRIORITY,
588588
gpio_sifive_irq_handler,
589589
DEVICE_GET(gpio_sifive_0),
590590
0);
591591
#endif
592592
#ifdef CONFIG_SIFIVE_GPIO_0_IRQ_31
593-
IRQ_CONNECT(CONFIG_SIFIVE_GPIO_0_IRQ_31,
593+
IRQ_CONNECT(RISCV_MAX_GENERIC_IRQ + CONFIG_SIFIVE_GPIO_0_IRQ_31,
594594
CONFIG_GPIO_SIFIVE_31_PRIORITY,
595595
gpio_sifive_irq_handler,
596596
DEVICE_GET(gpio_sifive_0),

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