test: driver: adc: add some nucleo boards support for adc test cases

cybertale · nashif · commit 8bda26bd138c · 2019-05-07T23:15:58.000-04:00
Some configuration for the boards have to be added into test_adc.c file
so user can test driver with the test cases. Several nucleo boards are
added including F091RC/F103RB/F207ZG/F302R8/F401RE/F746ZG/L073RZ/L476RG.

And also ADC dts and pinmux configuration are added into boards own
pinmux.c and dts file.

Signed-off-by: Song Qiang &lt;songqiang1304521@gmail.com&gt;
diff --git a/boards/arm/nucleo_f091rc/nucleo_f091rc.dts b/boards/arm/nucleo_f091rc/nucleo_f091rc.dts
@@ -93,3 +93,7 @@ arduino_spi: &spi1 {
 		};
 	};
 };
+
+&adc1 {
+	status = "ok";
+};
diff --git a/boards/arm/nucleo_f091rc/pinmux.c b/boards/arm/nucleo_f091rc/pinmux.c
@@ -40,6 +40,9 @@ static const struct pin_config pinconf[] = {
 	{STM32_PIN_PB14, STM32F0_PINMUX_FUNC_PB14_SPI2_MISO},
 	{STM32_PIN_PB15, STM32F0_PINMUX_FUNC_PB15_SPI2_MOSI},
 #endif /* CONFIG_SPI_2 */
+#ifdef CONFIG_ADC_1
+	{STM32_PIN_PA0, STM32F0_PINMUX_FUNC_PA0_ADC_IN0},
+#endif /* CONFIG_ADC_1 */
 };
 
 static int pinmux_stm32_init(struct device *port)
diff --git a/boards/arm/nucleo_f103rb/nucleo_f103rb.dts b/boards/arm/nucleo_f103rb/nucleo_f103rb.dts
@@ -78,3 +78,7 @@ arduino_spi: &spi1 {
 &iwdg {
 	status = "ok";
 };
+
+&adc1 {
+	status = "ok";
+};
diff --git a/boards/arm/nucleo_f103rb/pinmux.c b/boards/arm/nucleo_f103rb/pinmux.c
@@ -41,6 +41,9 @@ static const struct pin_config pinconf[] = {
 	{STM32_PIN_PB14, STM32F1_PINMUX_FUNC_PB14_SPI2_MASTER_MISO},
 	{STM32_PIN_PB15, STM32F1_PINMUX_FUNC_PB15_SPI2_MASTER_MOSI},
 #endif /* CONFIG_SPI_2 */
+#ifdef CONFIG_ADC_1
+	{STM32_PIN_PA0, STM32F1_PINMUX_FUNC_PA0_ADC123_IN0},
+#endif /* CONFIG_ADC_1 */
 };
 
 static int pinmux_stm32_init(struct device *port)
diff --git a/boards/arm/nucleo_f207zg/nucleo_f207zg.dts b/boards/arm/nucleo_f207zg/nucleo_f207zg.dts
@@ -72,3 +72,7 @@ arduino_serial: &usart6 {};
 &iwdg {
 	status = "ok";
 };
+
+&adc1 {
+	status = "ok";
+};
diff --git a/boards/arm/nucleo_f207zg/pinmux.c b/boards/arm/nucleo_f207zg/pinmux.c
@@ -39,6 +39,9 @@ static const struct pin_config pinconf[] = {
 	{STM32_PIN_PA11, STM32F2_PINMUX_FUNC_PA11_OTG_FS_DM},
 	{STM32_PIN_PA12, STM32F2_PINMUX_FUNC_PA12_OTG_FS_DP},
 #endif	/* CONFIG_USB_DC_STM32 */
+#ifdef CONFIG_ADC_1
+	{STM32_PIN_PA0, STM32F2_PINMUX_FUNC_PA0_ADC123_IN0},
+#endif /* CONFIG_ADC_1 */
 };
 
 static int pinmux_stm32_init(struct device *port)
diff --git a/boards/arm/nucleo_f302r8/nucleo_f302r8.dts b/boards/arm/nucleo_f302r8/nucleo_f302r8.dts
@@ -82,3 +82,7 @@ arduino_spi: &spi2 {};
 &rtc {
 	status = "ok";
 };
+
+&adc1 {
+	status = "ok";
+};
diff --git a/boards/arm/nucleo_f302r8/pinmux.c b/boards/arm/nucleo_f302r8/pinmux.c
@@ -39,6 +39,9 @@ static const struct pin_config pinconf[] = {
 #ifdef CONFIG_PWM_STM32_2
 	{STM32_PIN_PA0, STM32F3_PINMUX_FUNC_PA0_PWM2_CH1},
 #endif /* CONFIG_PWM_STM32_2 */
+#ifdef CONFIG_ADC_1
+	{STM32_PIN_PA0, STM32F3_PINMUX_FUNC_PA0_ADC1_IN1},
+#endif /* CONFIG_ADC_1 */
 };
 
 static int pinmux_stm32_init(struct device *port)
diff --git a/boards/arm/nucleo_f401re/nucleo_f401re.dts b/boards/arm/nucleo_f401re/nucleo_f401re.dts
@@ -117,3 +117,7 @@ arduino_spi: &spi1 {
 &rtc {
 	status = "ok";
 };
+
+&adc1 {
+	status = "ok";
+};
diff --git a/boards/arm/nucleo_f401re/pinmux.c b/boards/arm/nucleo_f401re/pinmux.c
@@ -41,6 +41,9 @@ static const struct pin_config pinconf[] = {
 	{STM32_PIN_PB14, STM32F4_PINMUX_FUNC_PB14_SPI2_MISO},
 	{STM32_PIN_PB15, STM32F4_PINMUX_FUNC_PB15_SPI2_MOSI},
 #endif	/* CONFIG_SPI_1 */
+#ifdef CONFIG_ADC_1
+	{STM32_PIN_PA0, STM32F4_PINMUX_FUNC_PA0_ADC123_IN0},
+#endif	/* CONFIG_ADC_1 */
 };
 
 static int pinmux_stm32_init(struct device *port)
diff --git a/boards/arm/nucleo_f746zg/nucleo_f746zg.dts b/boards/arm/nucleo_f746zg/nucleo_f746zg.dts
@@ -108,3 +108,7 @@ arduino_spi: &spi1 {};
 	phase_seg2 = <5>;
 	status = "ok";
 };
+
+&adc1 {
+	status = "ok";
+};
diff --git a/boards/arm/nucleo_f746zg/pinmux.c b/boards/arm/nucleo_f746zg/pinmux.c
@@ -66,6 +66,9 @@ static const struct pin_config pinconf[] = {
 	{STM32_PIN_PD0, STM32F7_PINMUX_FUNC_PD0_CAN_RX},
 	{STM32_PIN_PD1, STM32F7_PINMUX_FUNC_PD1_CAN_TX},
 #endif /* CONFIG_CAN_1 */
+#ifdef CONFIG_ADC_1
+	{ STM32_PIN_PA0, STM32F7_PINMUX_FUNC_PA0_ADC123_IN0 },
+#endif	/* CONFIG_ADC_1 */
 };
 
 static int pinmux_stm32_init(struct device *port)
diff --git a/boards/arm/nucleo_l073rz/nucleo_l073rz.dts b/boards/arm/nucleo_l073rz/nucleo_l073rz.dts
@@ -65,3 +65,7 @@ arduino_spi: &spi1 {
 &iwdg {
 	status = "ok";
 };
+
+&adc1 {
+	status = "ok";
+};
diff --git a/boards/arm/nucleo_l073rz/pinmux.c b/boards/arm/nucleo_l073rz/pinmux.c
@@ -31,6 +31,9 @@ static const struct pin_config pinconf[] = {
 	{STM32_PIN_PA6, STM32L0_PINMUX_FUNC_PA6_SPI1_MISO},
 	{STM32_PIN_PA7, STM32L0_PINMUX_FUNC_PA7_SPI1_MOSI},
 #endif /* CONFIG_SPI_1 */
+#ifdef CONFIG_ADC_1
+	{STM32_PIN_PA0, STM32L0_PINMUX_FUNC_PA0_ADC_IN0},
+#endif /* CONFIG_ADC_1 */
 };
 
 static int pinmux_stm32_init(struct device *port)
diff --git a/boards/arm/nucleo_l476rg/nucleo_l476rg.dts b/boards/arm/nucleo_l476rg/nucleo_l476rg.dts
@@ -79,3 +79,7 @@ arduino_i2c: &i2c1 {
 &rtc {
 	status = "ok";
 };
+
+&adc1 {
+	status = "ok";
+};
diff --git a/boards/arm/nucleo_l476rg/pinmux.c b/boards/arm/nucleo_l476rg/pinmux.c
@@ -60,6 +60,9 @@ static const struct pin_config pinconf[] = {
 	{STM32_PIN_PC11, STM32L4X_PINMUX_FUNC_PC11_SPI3_MISO},
 	{STM32_PIN_PC12, STM32L4X_PINMUX_FUNC_PC12_SPI3_MOSI},
 #endif /* CONFIG_SPI_3 */
+#ifdef CONFIG_ADC_1
+	{STM32_PIN_PC0, STM32L4X_PINMUX_FUNC_PC0_ADC123_IN1},
+#endif /* CONFIG_ADC_1 */
 };
 
 static int pinmux_stm32_init(struct device *port)
diff --git a/tests/drivers/adc/adc_api/src/test_adc.c b/tests/drivers/adc/adc_api/src/test_adc.c
@@ -123,13 +123,43 @@
 
 #elif defined(CONFIG_SOC_FAMILY_SAM0)
 #include <soc.h>
-#define ADC_DEVICE_NAME		DT_ATMEL_SAM0_ADC_0_LABEL
+#define ADC_DEVICE_NAME         DT_ATMEL_SAM0_ADC_0_LABEL
+#define ADC_RESOLUTION          12
+#define ADC_GAIN                ADC_GAIN_1
+#define ADC_REFERENCE           ADC_REF_INTERNAL
+#define ADC_ACQUISITION_TIME    ADC_ACQ_TIME_DEFAULT
+#define ADC_1ST_CHANNEL_ID      0
+#define ADC_1ST_CHANNEL_INPUT   ADC_INPUTCTRL_MUXPOS_SCALEDIOVCC_Val
+
+#elif defined(CONFIG_BOARD_NUCLEO_F091RC) || \
+	defined(CONFIG_BOARD_NUCLEO_F103RB) || \
+	defined(CONFIG_BOARD_NUCLEO_F207ZG) || \
+	defined(CONFIG_BOARD_NUCLEO_F401RE) || \
+	defined(CONFIG_BOARD_NUCLEO_F746ZG) || \
+	defined(CONFIG_BOARD_NUCLEO_L073RZ)
+#define ADC_DEVICE_NAME		DT_ADC_1_NAME
 #define ADC_RESOLUTION		12
 #define ADC_GAIN		ADC_GAIN_1
 #define ADC_REFERENCE		ADC_REF_INTERNAL
 #define ADC_ACQUISITION_TIME	ADC_ACQ_TIME_DEFAULT
 #define ADC_1ST_CHANNEL_ID	0
-#define ADC_1ST_CHANNEL_INPUT	ADC_INPUTCTRL_MUXPOS_SCALEDIOVCC_Val
+
+#elif defined(CONFIG_BOARD_NUCLEO_F302R8)
+#define ADC_DEVICE_NAME		DT_ADC_1_NAME
+#define ADC_RESOLUTION		12
+#define ADC_GAIN		ADC_GAIN_1
+#define ADC_REFERENCE		ADC_REF_INTERNAL
+#define ADC_ACQUISITION_TIME	ADC_ACQ_TIME_DEFAULT
+/* Some F3 series SOCs do not have channel 0 connected to an external GPIO. */
+#define ADC_1ST_CHANNEL_ID	1
+
+#elif defined(CONFIG_BOARD_NUCLEO_L476RG)
+#define ADC_DEVICE_NAME		DT_ADC_1_NAME
+#define ADC_RESOLUTION		10
+#define ADC_GAIN		ADC_GAIN_1
+#define ADC_REFERENCE		ADC_REF_INTERNAL
+#define ADC_ACQUISITION_TIME	ADC_ACQ_TIME_DEFAULT
+#define ADC_1ST_CHANNEL_ID	1
 
 #else
 #error "Unsupported board."

-Original file line number
+Diff line change
 		};
 	};
 };
++
 +&adc1 {
 +	status = "ok";
 +};