77#define ADC_CONTEXT_USES_KERNEL_TIMER
88#include "adc_context.h"
99#include <nrfx_saadc.h>
10- #include <zephyr/dt-bindings/adc/nrf-saadc-v3.h>
11- #include <zephyr/dt-bindings/adc/nrf-saadc-nrf54l.h>
12- #include <zephyr/dt-bindings/adc/nrf-saadc-haltium.h>
10+ #include <zephyr/dt-bindings/adc/nrf-saadc.h>
1311#include <zephyr/linker/devicetree_regions.h>
1412#include <zephyr/logging/log.h>
1513#include <zephyr/irq.h>
@@ -18,84 +16,22 @@ LOG_MODULE_REGISTER(adc_nrfx_saadc, CONFIG_ADC_LOG_LEVEL);
1816
1917#define DT_DRV_COMPAT nordic_nrf_saadc
2018
21- #if (NRF_SAADC_HAS_AIN_AS_PIN )
22-
23- #if defined(CONFIG_NRF_PLATFORM_HALTIUM )
24- static const uint32_t saadc_psels [NRF_SAADC_AIN13 + 1 ] = {
25- [NRF_SAADC_AIN0 ] = NRF_PIN_PORT_TO_PIN_NUMBER (0U , 1 ),
26- [NRF_SAADC_AIN1 ] = NRF_PIN_PORT_TO_PIN_NUMBER (1U , 1 ),
27- [NRF_SAADC_AIN2 ] = NRF_PIN_PORT_TO_PIN_NUMBER (2U , 1 ),
28- [NRF_SAADC_AIN3 ] = NRF_PIN_PORT_TO_PIN_NUMBER (3U , 1 ),
29- [NRF_SAADC_AIN4 ] = NRF_PIN_PORT_TO_PIN_NUMBER (4U , 1 ),
30- [NRF_SAADC_AIN5 ] = NRF_PIN_PORT_TO_PIN_NUMBER (5U , 1 ),
31- [NRF_SAADC_AIN6 ] = NRF_PIN_PORT_TO_PIN_NUMBER (6U , 1 ),
32- [NRF_SAADC_AIN7 ] = NRF_PIN_PORT_TO_PIN_NUMBER (7U , 1 ),
33- [NRF_SAADC_AIN8 ] = NRF_PIN_PORT_TO_PIN_NUMBER (0U , 9 ),
34- [NRF_SAADC_AIN9 ] = NRF_PIN_PORT_TO_PIN_NUMBER (1U , 9 ),
35- [NRF_SAADC_AIN10 ] = NRF_PIN_PORT_TO_PIN_NUMBER (2U , 9 ),
36- [NRF_SAADC_AIN11 ] = NRF_PIN_PORT_TO_PIN_NUMBER (3U , 9 ),
37- [NRF_SAADC_AIN12 ] = NRF_PIN_PORT_TO_PIN_NUMBER (4U , 9 ),
38- [NRF_SAADC_AIN13 ] = NRF_PIN_PORT_TO_PIN_NUMBER (5U , 9 ),
39- };
40- #elif defined(CONFIG_SOC_NRF54L05 ) || defined(CONFIG_SOC_NRF54L10 ) || defined(CONFIG_SOC_NRF54L15 )
41- static const uint32_t saadc_psels [NRF_SAADC_DVDD + 1 ] = {
42- [NRF_SAADC_AIN0 ] = NRF_PIN_PORT_TO_PIN_NUMBER (4U , 1 ),
43- [NRF_SAADC_AIN1 ] = NRF_PIN_PORT_TO_PIN_NUMBER (5U , 1 ),
44- [NRF_SAADC_AIN2 ] = NRF_PIN_PORT_TO_PIN_NUMBER (6U , 1 ),
45- [NRF_SAADC_AIN3 ] = NRF_PIN_PORT_TO_PIN_NUMBER (7U , 1 ),
46- [NRF_SAADC_AIN4 ] = NRF_PIN_PORT_TO_PIN_NUMBER (11U , 1 ),
47- [NRF_SAADC_AIN5 ] = NRF_PIN_PORT_TO_PIN_NUMBER (12U , 1 ),
48- [NRF_SAADC_AIN6 ] = NRF_PIN_PORT_TO_PIN_NUMBER (13U , 1 ),
49- [NRF_SAADC_AIN7 ] = NRF_PIN_PORT_TO_PIN_NUMBER (14U , 1 ),
50- [NRF_SAADC_VDD ] = NRF_SAADC_INPUT_VDD ,
51- [NRF_SAADC_AVDD ] = NRF_SAADC_INPUT_AVDD ,
52- [NRF_SAADC_DVDD ] = NRF_SAADC_INPUT_DVDD ,
53- };
54- #elif defined(NRF54LM20A_ENGA_XXAA )
55- static const uint32_t saadc_psels [NRF_SAADC_DVDD + 1 ] = {
56- [NRF_SAADC_AIN0 ] = NRF_PIN_PORT_TO_PIN_NUMBER (0U , 1 ),
57- [NRF_SAADC_AIN1 ] = NRF_PIN_PORT_TO_PIN_NUMBER (31U , 1 ),
58- [NRF_SAADC_AIN2 ] = NRF_PIN_PORT_TO_PIN_NUMBER (30U , 1 ),
59- [NRF_SAADC_AIN3 ] = NRF_PIN_PORT_TO_PIN_NUMBER (29U , 1 ),
60- [NRF_SAADC_AIN4 ] = NRF_PIN_PORT_TO_PIN_NUMBER (6U , 1 ),
61- [NRF_SAADC_AIN5 ] = NRF_PIN_PORT_TO_PIN_NUMBER (5U , 1 ),
62- [NRF_SAADC_AIN6 ] = NRF_PIN_PORT_TO_PIN_NUMBER (4U , 1 ),
63- [NRF_SAADC_AIN7 ] = NRF_PIN_PORT_TO_PIN_NUMBER (3U , 1 ),
64- [NRF_SAADC_VDD ] = NRF_SAADC_INPUT_VDD ,
65- [NRF_SAADC_AVDD ] = NRF_SAADC_INPUT_AVDD ,
66- [NRF_SAADC_DVDD ] = NRF_SAADC_INPUT_DVDD ,
67- };
68- #elif defined(NRF54LV10A_ENGA_XXAA )
69- static const uint32_t saadc_psels [NRF_SAADC_AIN7 + 1 ] = {
70- [NRF_SAADC_AIN0 ] = NRF_PIN_PORT_TO_PIN_NUMBER (0U , 1 ),
71- [NRF_SAADC_AIN1 ] = NRF_PIN_PORT_TO_PIN_NUMBER (1U , 1 ),
72- [NRF_SAADC_AIN2 ] = NRF_PIN_PORT_TO_PIN_NUMBER (2U , 1 ),
73- [NRF_SAADC_AIN3 ] = NRF_PIN_PORT_TO_PIN_NUMBER (3U , 1 ),
74- [NRF_SAADC_AIN4 ] = NRF_PIN_PORT_TO_PIN_NUMBER (7U , 1 ),
75- [NRF_SAADC_AIN5 ] = NRF_PIN_PORT_TO_PIN_NUMBER (10U , 1 ),
76- [NRF_SAADC_AIN6 ] = NRF_PIN_PORT_TO_PIN_NUMBER (11U , 1 ),
77- [NRF_SAADC_AIN7 ] = NRF_PIN_PORT_TO_PIN_NUMBER (12U , 1 ),
78- };
79- #endif
80-
81- #else
82- BUILD_ASSERT ((NRF_SAADC_AIN0 == NRF_SAADC_INPUT_AIN0 ) &&
83- (NRF_SAADC_AIN1 == NRF_SAADC_INPUT_AIN1 ) &&
84- (NRF_SAADC_AIN2 == NRF_SAADC_INPUT_AIN2 ) &&
85- (NRF_SAADC_AIN3 == NRF_SAADC_INPUT_AIN3 ) &&
86- (NRF_SAADC_AIN4 == NRF_SAADC_INPUT_AIN4 ) &&
87- (NRF_SAADC_AIN5 == NRF_SAADC_INPUT_AIN5 ) &&
88- (NRF_SAADC_AIN6 == NRF_SAADC_INPUT_AIN6 ) &&
89- (NRF_SAADC_AIN7 == NRF_SAADC_INPUT_AIN7 ) &&
19+ BUILD_ASSERT ((NRF_SAADC_AIN0 == NRFX_ANALOG_EXTERNAL_AIN0 ) &&
20+ (NRF_SAADC_AIN1 == NRFX_ANALOG_EXTERNAL_AIN1 ) &&
21+ (NRF_SAADC_AIN2 == NRFX_ANALOG_EXTERNAL_AIN2 ) &&
22+ (NRF_SAADC_AIN3 == NRFX_ANALOG_EXTERNAL_AIN3 ) &&
23+ (NRF_SAADC_AIN4 == NRFX_ANALOG_EXTERNAL_AIN4 ) &&
24+ (NRF_SAADC_AIN5 == NRFX_ANALOG_EXTERNAL_AIN5 ) &&
25+ (NRF_SAADC_AIN6 == NRFX_ANALOG_EXTERNAL_AIN6 ) &&
26+ (NRF_SAADC_AIN7 == NRFX_ANALOG_EXTERNAL_AIN7 ) &&
9027#if defined(SAADC_CH_PSELP_PSELP_VDDHDIV5 )
91- (NRF_SAADC_VDDHDIV5 == NRF_SAADC_INPUT_VDDHDIV5 ) &&
28+ (NRF_SAADC_VDDHDIV5 == NRFX_ANALOG_INTERNAL_VDDHDIV5 ) &&
9229#endif
9330#if defined(SAADC_CH_PSELP_PSELP_VDD )
94- (NRF_SAADC_VDD == NRF_SAADC_INPUT_VDD ) &&
31+ (NRF_SAADC_VDD == NRFX_ANALOG_INTERNAL_VDD ) &&
9532#endif
9633 1 ,
97- "Definitions from nrf-adc.h do not match those from nrf_saadc.h" );
98- #endif
34+ "Definitions from nrf-saadc.h do not match those from nrfx_analog_common.h" );
9935
10036#if defined(CONFIG_NRF_PLATFORM_HALTIUM )
10137#include <dmm.h>
@@ -186,44 +122,6 @@ static int acq_time_set(nrf_saadc_channel_config_t *ch_cfg, uint16_t acquisition
186122 return 0 ;
187123}
188124
189- static int input_assign (nrf_saadc_input_t * pin_p ,
190- nrf_saadc_input_t * pin_n ,
191- const struct adc_channel_cfg * channel_cfg )
192- {
193- #if (NRF_SAADC_HAS_AIN_AS_PIN )
194- if (channel_cfg -> input_positive > ARRAY_SIZE (saadc_psels ) ||
195- channel_cfg -> input_positive < NRF_SAADC_AIN0 ) {
196- LOG_ERR ("Invalid analog positive input number: %d" , channel_cfg -> input_positive );
197- return - EINVAL ;
198- }
199-
200- * pin_p = saadc_psels [channel_cfg -> input_positive ];
201-
202- if (channel_cfg -> differential ) {
203- if (channel_cfg -> input_negative > ARRAY_SIZE (saadc_psels ) ||
204- channel_cfg -> input_negative < NRF_SAADC_AIN0 ||
205- (IS_ENABLED (CONFIG_NRF_PLATFORM_HALTIUM ) &&
206- (channel_cfg -> input_positive > NRF_SAADC_AIN7 ) !=
207- (channel_cfg -> input_negative > NRF_SAADC_AIN7 ))) {
208- LOG_ERR ("Invalid analog negative input number: %d" ,
209- channel_cfg -> input_negative );
210- return - EINVAL ;
211- }
212- * pin_n = saadc_psels [channel_cfg -> input_negative ];
213- } else {
214- * pin_n = NRF_SAADC_INPUT_DISABLED ;
215- }
216- #else
217- * pin_p = channel_cfg -> input_positive ;
218- * pin_n = channel_cfg -> differential ? channel_cfg -> input_negative
219- : NRF_SAADC_INPUT_DISABLED ;
220- #endif
221- LOG_DBG ("ADC positive input: %d" , * pin_p );
222- LOG_DBG ("ADC negative input: %d" , * pin_n );
223-
224- return 0 ;
225- }
226-
227125static int gain_set (nrf_saadc_channel_config_t * ch_cfg , enum adc_gain gain )
228126{
229127#if NRF_SAADC_HAS_CH_GAIN
@@ -342,7 +240,11 @@ static int adc_nrfx_channel_setup(const struct device *dev,
342240
343241 ch_cfg = & cfg .channel_config ;
344242
345- err = input_assign (& cfg .pin_p , & cfg .pin_n , channel_cfg );
243+ err = nrfx_saadc_input_convert (channel_cfg -> input_positive ,
244+ channel_cfg -> input_negative ,
245+ channel_cfg -> differential ,
246+ & cfg .pin_p ,
247+ & cfg .pin_n );
346248 if (err != 0 ) {
347249 return err ;
348250 }
@@ -677,38 +579,9 @@ static DEVICE_API(adc, adc_nrfx_driver_api) = {
677579#ifdef CONFIG_ADC_ASYNC
678580 .read_async = adc_nrfx_read_async ,
679581#endif
680- #if defined(NRF54LV10A_ENGA_XXAA )
681- .ref_internal = 1300 ,
682- #elif defined(CONFIG_SOC_COMPATIBLE_NRF54LX )
683- .ref_internal = 900 ,
684- #elif defined(CONFIG_NRF_PLATFORM_HALTIUM )
685- .ref_internal = 1024 ,
686- #else
687- .ref_internal = 600 ,
688- #endif
582+ .ref_internal = NRFX_ANALOG_SAADC_REF_INTERNAL_VALUE ,
689583};
690584
691- #if defined(CONFIG_NRF_PLATFORM_HALTIUM )
692- /* AIN8-AIN14 inputs are on 3v3 GPIO port and they cannot be mixed with other
693- * analog inputs (from 1v8 ports) in differential mode.
694- */
695- #define CH_IS_3V3 (val ) (val >= NRF_SAADC_AIN8)
696-
697- #define MIXED_3V3_1V8_INPUTS (node ) \
698- (DT_NODE_HAS_PROP(node, zephyr_input_negative) && \
699- (CH_IS_3V3(DT_PROP_OR(node, zephyr_input_negative, 0)) != \
700- CH_IS_3V3(DT_PROP_OR(node, zephyr_input_positive, 0))))
701- #else
702- #define MIXED_3V3_1V8_INPUTS (node ) false
703- #endif
704-
705- #define VALIDATE_CHANNEL_CONFIG (node ) \
706- BUILD_ASSERT(MIXED_3V3_1V8_INPUTS(node) == false, \
707- "1v8 inputs cannot be mixed with 3v3 inputs");
708-
709- /* Validate configuration of all channels. */
710- DT_FOREACH_CHILD (DT_DRV_INST (0 ), VALIDATE_CHANNEL_CONFIG )
711-
712585NRF_DT_CHECK_NODE_HAS_REQUIRED_MEMORY_REGIONS (DT_DRV_INST (0 ));
713586
714587DEVICE_DT_INST_DEFINE (0 , init_saadc , NULL , NULL , NULL , POST_KERNEL ,
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