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lines changed Original file line number Diff line number Diff line change 1111 * Exception/interrupt context helpers.
1212 */
1313
14- #ifndef ZEPHYR_ARCH_ARM_INCLUDE_AARCH32_CORTEX_A_R_EXC_H_
15- #define ZEPHYR_ARCH_ARM_INCLUDE_AARCH32_CORTEX_A_R_EXC_H_
14+ #ifndef ZEPHYR_ARCH_ARM_INCLUDE_CORTEX_A_R_EXCEPTION_H_
15+ #define ZEPHYR_ARCH_ARM_INCLUDE_CORTEX_A_R_EXCEPTION_H_
1616
1717#include <zephyr/arch/cpu.h>
1818
@@ -64,4 +64,4 @@ extern void z_arm_cortex_r_svc(void);
6464
6565#endif /* _ASMLANGUAGE */
6666
67- #endif /* ZEPHYR_ARCH_ARM_INCLUDE_AARCH32_CORTEX_A_R_EXC_H_ */
67+ #endif /* ZEPHYR_ARCH_ARM_INCLUDE_CORTEX_A_R_EXCEPTION_H_ */
Original file line number Diff line number Diff line change 1111 * Exception/interrupt context helpers.
1212 */
1313
14- #ifndef ZEPHYR_ARCH_ARM_INCLUDE_AARCH32_CORTEX_M_EXC_H_
15- #define ZEPHYR_ARCH_ARM_INCLUDE_AARCH32_CORTEX_M_EXC_H_
14+ #ifndef ZEPHYR_ARCH_ARM_INCLUDE_CORTEX_M_EXCEPTION_H_
15+ #define ZEPHYR_ARCH_ARM_INCLUDE_CORTEX_M_EXCEPTION_H_
1616
1717#include <zephyr/arch/cpu.h>
1818
@@ -200,4 +200,4 @@ bool z_arm_debug_monitor_event_error_check(void);
200200
201201#endif /* _ASMLANGUAGE */
202202
203- #endif /* ZEPHYR_ARCH_ARM_INCLUDE_AARCH32_CORTEX_M_EXC_H_ */
203+ #endif /* ZEPHYR_ARCH_ARM_INCLUDE_CORTEX_M_EXCEPTION_H_ */
Original file line number Diff line number Diff line change 1111 * Exception/interrupt context helpers.
1212 */
1313
14- #ifndef ZEPHYR_ARCH_ARM64_INCLUDE_EXC_H_
15- #define ZEPHYR_ARCH_ARM64_INCLUDE_EXC_H_
14+ #ifndef ZEPHYR_ARCH_ARM64_INCLUDE_EXCEPTION_H_
15+ #define ZEPHYR_ARCH_ARM64_INCLUDE_EXCEPTION_H_
1616
1717#include <zephyr/arch/cpu.h>
1818
@@ -37,4 +37,4 @@ static ALWAYS_INLINE bool arch_is_in_isr(void)
3737
3838#endif /* _ASMLANGUAGE */
3939
40- #endif /* ZEPHYR_ARCH_ARM64_INCLUDE_EXC_H_ */
40+ #endif /* ZEPHYR_ARCH_ARM64_INCLUDE_EXCEPTION_H_ */
Original file line number Diff line number Diff line change 1111 * ARC-specific kernel exception handling interface. Included by arc/arch.h.
1212 */
1313
14- #ifndef ZEPHYR_INCLUDE_ARCH_ARC_V2_EXC_H_
15- #define ZEPHYR_INCLUDE_ARCH_ARC_V2_EXC_H_
14+ #ifndef ZEPHYR_INCLUDE_ARCH_ARC_V2_EXCEPTION_H_
15+ #define ZEPHYR_INCLUDE_ARCH_ARC_V2_EXCEPTION_H_
1616
1717#ifdef __cplusplus
1818extern "C" {
@@ -44,4 +44,4 @@ typedef struct _irq_stack_frame z_arch_esf_t;
4444#define ARC_EV_MISALIGNED 0xD
4545#define ARC_EV_VEC_UNIT 0xE
4646
47- #endif /* ZEPHYR_INCLUDE_ARCH_ARC_V2_EXC_H_ */
47+ #endif /* ZEPHYR_INCLUDE_ARCH_ARC_V2_EXCEPTION_H_ */
Original file line number Diff line number Diff line change 99 * @brief ARM AArch32 Cortex-A and Cortex-R public exception handling
1010 */
1111
12- #ifndef ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_CORTEX_A_R_EXC_H_
13- #define ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_CORTEX_A_R_EXC_H_
12+ #ifndef ZEPHYR_INCLUDE_ARCH_ARM_CORTEX_A_R_EXCEPTION_H_
13+ #define ZEPHYR_INCLUDE_ARCH_ARM_CORTEX_A_R_EXCEPTION_H_
1414
1515#ifdef _ASMLANGUAGE
1616GTEXT (z_arm_exc_exit );
@@ -85,4 +85,4 @@ extern void z_arm_exc_exit(bool fatal);
8585
8686#endif /* _ASMLANGUAGE */
8787
88- #endif /* ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_CORTEX_A_R_EXC_H_ */
88+ #endif /* ZEPHYR_INCLUDE_ARCH_ARM_CORTEX_A_R_EXCEPTION_H_ */
Original file line number Diff line number Diff line change 99 * @brief ARM AArch32 Cortex-M public exception handling
1010 */
1111
12- #ifndef ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_CORTEX_M_EXC_H_
13- #define ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_CORTEX_M_EXC_H_
12+ #ifndef ZEPHYR_INCLUDE_ARCH_ARM_CORTEX_M_EXCEPTION_H_
13+ #define ZEPHYR_INCLUDE_ARCH_ARM_CORTEX_M_EXCEPTION_H_
1414
1515#include <zephyr/devicetree.h>
1616
@@ -129,4 +129,4 @@ extern void z_arm_exc_exit(void);
129129
130130#endif /* _ASMLANGUAGE */
131131
132- #endif /* ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_CORTEX_M_EXC_H_ */
132+ #endif /* ZEPHYR_INCLUDE_ARCH_ARM_CORTEX_M_EXCEPTION_H_ */
Original file line number Diff line number Diff line change 1212 * arm/arch.h.
1313 */
1414
15- #ifndef ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_EXC_H_
16- #define ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_EXC_H_
15+ #ifndef ZEPHYR_INCLUDE_ARCH_ARM_EXCEPTION_H_
16+ #define ZEPHYR_INCLUDE_ARCH_ARM_EXCEPTION_H_
1717
1818#if defined(CONFIG_CPU_CORTEX_M )
1919#include <zephyr/arch/arm/cortex_m/exception.h>
2323#error Unknown ARM architecture
2424#endif /* CONFIG_CPU_CORTEX_M */
2525
26- #endif /* ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_EXC_H_ */
26+ #endif /* ZEPHYR_INCLUDE_ARCH_ARM_EXCEPTION_H_ */
Original file line number Diff line number Diff line change 66 * SPDX-License-Identifier: Apache-2.0
77 */
88
9- #ifndef ZEPHYR_INCLUDE_ARCH_MIPS_EXP_H_
10- #define ZEPHYR_INCLUDE_ARCH_MIPS_EXP_H_
9+ #ifndef ZEPHYR_INCLUDE_ARCH_MIPS_EXPCEPTION_H_
10+ #define ZEPHYR_INCLUDE_ARCH_MIPS_EXPCEPTION_H_
1111
1212#ifndef _ASMLANGUAGE
1313#include <zephyr/types.h>
@@ -58,4 +58,4 @@ typedef struct __esf z_arch_esf_t;
5858
5959#endif /* _ASMLANGUAGE */
6060
61- #endif /* ZEPHYR_INCLUDE_ARCH_MIPS_EXP_H_ */
61+ #endif /* ZEPHYR_INCLUDE_ARCH_MIPS_EXPCEPTION_H_ */
Original file line number Diff line number Diff line change 1212 * RISCV-specific kernel exception handling interface.
1313 */
1414
15- #ifndef ZEPHYR_INCLUDE_ARCH_RISCV_EXP_H_
16- #define ZEPHYR_INCLUDE_ARCH_RISCV_EXP_H_
15+ #ifndef ZEPHYR_INCLUDE_ARCH_RISCV_EXCEPTION_H_
16+ #define ZEPHYR_INCLUDE_ARCH_RISCV_EXCEPTION_H_
1717
1818#ifndef _ASMLANGUAGE
1919#include <zephyr/types.h>
@@ -98,4 +98,4 @@ typedef struct soc_esf soc_esf_t;
9898
9999#endif /* _ASMLANGUAGE */
100100
101- #endif /* ZEPHYR_INCLUDE_ARCH_RISCV_EXP_H_ */
101+ #endif /* ZEPHYR_INCLUDE_ARCH_RISCV_EXCEPTION_H_ */
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