Skip to content

Commit b3dd7d8

Browse files
committed
i386: Return true for (SUBREG (MEM....)) in register_no_elim_operand [PR105927]
Under certain conditions register_operand predicate also allows subregs of memory operands. When RTL checking is enabled, these will fail with REGNO (op). Allow subregs of memory operands, these are guaranteed to be reloaded to a register. 2022-06-13 Uroš Bizjak <ubizjak@gmail.com> gcc/ChangeLog: PR target/105927 * config/i386/predicates.md (register_no_elim_operand): Return true for subreg of a memory operand. gcc/testsuite/ChangeLog: PR target/105927 * gcc.target/i386/pr105927.c: New test.
1 parent 77718f3 commit b3dd7d8

File tree

2 files changed

+25
-0
lines changed

2 files changed

+25
-0
lines changed

gcc/config/i386/predicates.md

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -672,6 +672,12 @@
672672
{
673673
if (SUBREG_P (op))
674674
op = SUBREG_REG (op);
675+
676+
/* Before reload, we can allow (SUBREG (MEM...)) as a register operand
677+
because it is guaranteed to be reloaded into one. */
678+
if (MEM_P (op))
679+
return true;
680+
675681
return !(op == arg_pointer_rtx
676682
|| op == frame_pointer_rtx
677683
|| IN_RANGE (REGNO (op),
@@ -685,6 +691,7 @@
685691
{
686692
if (SUBREG_P (op))
687693
op = SUBREG_REG (op);
694+
688695
if (reload_completed)
689696
return REG_OK_FOR_INDEX_STRICT_P (op);
690697
else
Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,18 @@
1+
/* PR target/105927 */
2+
/* { dg-do compile { target ia32 } } */
3+
/* { dg-options "-O1 -fno-tree-dce -mtune=k6-3 -msse2" } */
4+
5+
typedef _Float16 __attribute__((__vector_size__(4))) U;
6+
typedef _Float16 __attribute__((__vector_size__(2))) V;
7+
typedef short __attribute__((__vector_size__(4))) W;
8+
V v;
9+
U u;
10+
11+
extern void bar(W i);
12+
13+
void
14+
foo(void)
15+
{
16+
U x = __builtin_shufflevector(v, u, 2, 0);
17+
bar(x >= 0);
18+
}

0 commit comments

Comments
 (0)