Skip to content

Commit 5a0c256

Browse files
BStroessermartinkpetersen
authored andcommitted
scsi: target: tcmu: Fix crash on ARM during cmd completion
If tcmu_handle_completions() has to process a padding shorter than sizeof(struct tcmu_cmd_entry), the current call to tcmu_flush_dcache_range() with sizeof(struct tcmu_cmd_entry) as length param is wrong and causes crashes on e.g. ARM, because tcmu_flush_dcache_range() in this case calls flush_dcache_page(vmalloc_to_page(start)); with start being an invalid address above the end of the vmalloc'ed area. The fix is to use the minimum of remaining ring space and sizeof(struct tcmu_cmd_entry) as the length param. The patch was tested on kernel 4.19.118. See https://bugzilla.kernel.org/show_bug.cgi?id=208045#c10 Link: https://lore.kernel.org/r/20200629093756.8947-1-bstroesser@ts.fujitsu.com Tested-by: JiangYu <lnsyyj@hotmail.com> Acked-by: Mike Christie <michael.christie@oracle.com> Signed-off-by: Bodo Stroesser <bstroesser@ts.fujitsu.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
1 parent b7a80da commit 5a0c256

File tree

1 file changed

+8
-1
lines changed

1 file changed

+8
-1
lines changed

drivers/target/target_core_user.c

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1221,7 +1221,14 @@ static unsigned int tcmu_handle_completions(struct tcmu_dev *udev)
12211221

12221222
struct tcmu_cmd_entry *entry = (void *) mb + CMDR_OFF + udev->cmdr_last_cleaned;
12231223

1224-
tcmu_flush_dcache_range(entry, sizeof(*entry));
1224+
/*
1225+
* Flush max. up to end of cmd ring since current entry might
1226+
* be a padding that is shorter than sizeof(*entry)
1227+
*/
1228+
size_t ring_left = head_to_end(udev->cmdr_last_cleaned,
1229+
udev->cmdr_size);
1230+
tcmu_flush_dcache_range(entry, ring_left < sizeof(*entry) ?
1231+
ring_left : sizeof(*entry));
12251232

12261233
if (tcmu_hdr_get_op(entry->hdr.len_op) == TCMU_OP_PAD) {
12271234
UPDATE_HEAD(udev->cmdr_last_cleaned,

0 commit comments

Comments
 (0)