@@ -1273,16 +1273,34 @@ int mmc_read(uint32_t cmd_index, uint32_t block_addr, uint32_t* dst,
12731273 if ((reg & EMMC_SD_SRS12_ERR_STAT ) == 0 ) { /* no errors */
12741274 /* if multi-block read, send CMD12 to stop transfer */
12751275 if (cmd_index == MMC_CMD18_READ_MULTIPLE ) {
1276- (void )mmc_send_cmd_internal (EMMC_SD_SRS03_CMD_ABORT ,
1277- MMC_CMD12_STOP_TRANS , (g_rca << SD_RCA_SHIFT ),
1278- EMMC_SD_RESP_R1 );
1276+ /* Clear transfer complete before CMD12 */
1277+ EMMC_SD_SRS12 = EMMC_SD_SRS12_TC ;
1278+
1279+ /* CMD12 argument: SD uses RCA, eMMC uses stuff bits */
1280+ #ifdef USE_EMMC
1281+ status = mmc_send_cmd_internal (EMMC_SD_SRS03_CMD_ABORT ,
1282+ MMC_CMD12_STOP_TRANS , 0 , EMMC_SD_RESP_R1B );
1283+ #else
1284+ status = mmc_send_cmd_internal (EMMC_SD_SRS03_CMD_ABORT ,
1285+ MMC_CMD12_STOP_TRANS , (g_rca << SD_RCA_SHIFT ), EMMC_SD_RESP_R1B );
1286+ #endif
1287+ if (status != 0 ) {
1288+ wolfBoot_printf ("mmc_read: CMD12 stop transfer error\n" );
1289+ /* Reset data/cmd lines to recover from error */
1290+ EMMC_SD_SRS11 |= EMMC_SD_SRS11_RESET_DAT_CMD ;
1291+ while (EMMC_SD_SRS11 & EMMC_SD_SRS11_RESET_DAT_CMD );
1292+ return -1 ;
1293+ }
12791294 }
12801295
12811296 /* wait for idle */
12821297 status = mmc_wait_busy (0 );
12831298 }
12841299 else {
12851300 wolfBoot_printf ("mmc_read: error SRS12: 0x%08X\n" , reg );
1301+ /* Reset data/cmd lines to recover from error */
1302+ EMMC_SD_SRS11 |= EMMC_SD_SRS11_RESET_DAT_CMD ;
1303+ while (EMMC_SD_SRS11 & EMMC_SD_SRS11_RESET_DAT_CMD );
12861304 status = -1 ; /* error */
12871305 }
12881306
@@ -1425,12 +1443,23 @@ int mmc_write(uint32_t cmd_index, uint32_t block_addr, const uint32_t* src,
14251443 if ((reg & EMMC_SD_SRS12_ERR_STAT ) == 0 ) { /* no errors */
14261444 /* if multi-block write, send CMD12 to stop transfer */
14271445 if (cmd_index == MMC_CMD25_WRITE_MULTIPLE ) {
1428- /* CMD12 requires CMD_ABORT type per SD spec */
1446+ /* Clear transfer complete before CMD12 */
1447+ EMMC_SD_SRS12 = EMMC_SD_SRS12_TC ;
1448+
1449+ /* CMD12 argument: SD uses RCA, eMMC uses stuff bits */
1450+ #ifdef USE_EMMC
14291451 status = mmc_send_cmd_internal (EMMC_SD_SRS03_CMD_ABORT ,
1430- MMC_CMD12_STOP_TRANS , (g_rca << SD_RCA_SHIFT ),
1431- EMMC_SD_RESP_R1B );
1452+ MMC_CMD12_STOP_TRANS , 0 , EMMC_SD_RESP_R1B );
1453+ #else
1454+ status = mmc_send_cmd_internal (EMMC_SD_SRS03_CMD_ABORT ,
1455+ MMC_CMD12_STOP_TRANS , (g_rca << SD_RCA_SHIFT ), EMMC_SD_RESP_R1B );
1456+ #endif
14321457 if (status != 0 ) {
14331458 wolfBoot_printf ("mmc_write: CMD12 stop transfer error\n" );
1459+ /* Reset data/cmd lines to recover from error */
1460+ EMMC_SD_SRS11 |= EMMC_SD_SRS11_RESET_DAT_CMD ;
1461+ while (EMMC_SD_SRS11 & EMMC_SD_SRS11_RESET_DAT_CMD );
1462+ return -1 ;
14341463 }
14351464 }
14361465
@@ -1439,6 +1468,9 @@ int mmc_write(uint32_t cmd_index, uint32_t block_addr, const uint32_t* src,
14391468 }
14401469 else {
14411470 wolfBoot_printf ("mmc_write: error SRS12: 0x%08X\n" , reg );
1471+ /* Reset data/cmd lines to recover from error */
1472+ EMMC_SD_SRS11 |= EMMC_SD_SRS11_RESET_DAT_CMD ;
1473+ while (EMMC_SD_SRS11 & EMMC_SD_SRS11_RESET_DAT_CMD );
14421474 status = -1 ; /* error */
14431475 }
14441476
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