From 9f033e4b962cc8ccd5f7c7a482027cd971d94680 Mon Sep 17 00:00:00 2001 From: Rupert Swarbrick Date: Tue, 28 May 2024 18:08:30 +0100 Subject: [PATCH] [jtag,dv] Handle trst_n during test_logic_reset task in driver Without this change, we end up blocked on e.g. the @(`HOST_CB) statement because the clock gets disabled by tck_en going low as part of the driver's do_reset_signals() function. Signed-off-by: Rupert Swarbrick --- hw/dv/sv/jtag_agent/jtag_driver.sv | 34 +++++++++++++++++++++--------- 1 file changed, 24 insertions(+), 10 deletions(-) diff --git a/hw/dv/sv/jtag_agent/jtag_driver.sv b/hw/dv/sv/jtag_agent/jtag_driver.sv index 4670413af0096..29f2c005c030b 100644 --- a/hw/dv/sv/jtag_agent/jtag_driver.sv +++ b/hw/dv/sv/jtag_agent/jtag_driver.sv @@ -105,18 +105,32 @@ class jtag_driver extends dv_base_driver #(jtag_item, jtag_agent_cfg); endtask // Task to drive TMS such that TAP FSM resets to Test-Logic-Reset state + // + // If there is a trst_n reset in the meantime, wait until the signal goes high again. After its + // does, we'll be in the test-logic-reset state by a different route, so the task can terminate. task drive_jtag_test_logic_reset(); `uvm_info(`gfn, "Driving JTAG to Test-Logic-Reset state", UVM_MEDIUM) - // Enable clock - cfg.vif.tck_en <= 1'b1; - `HOST_CB.tms <= 1'b0; - @(`HOST_CB); - // Go to Test Logic Reset - repeat (JTAG_TEST_LOGIC_RESET_CYCLES) begin - tms_tdi_step(1, 0); - end - // Go to Run-Test/Idle - tms_tdi_step(0, 0); + fork begin : isolation_fork + fork + begin + // Enable clock + cfg.vif.tck_en <= 1'b1; + `HOST_CB.tms <= 1'b0; + @(`HOST_CB); + // Go to Test Logic Reset + repeat (JTAG_TEST_LOGIC_RESET_CYCLES) begin + tms_tdi_step(1, 0); + end + // Go to Run-Test/Idle + tms_tdi_step(0, 0); + end + begin + wait (!cfg.vif.trst_n); + wait (cfg.vif.trst_n); + end + join_any + disable fork; + end join endtask // drive jtag req and retrieve rsp