tag:github.com,2008:https://github.com/vrosnet/machinekit/releases 2017-02-06T10:11:07Z tag:github.com,2008:Repository/92814271/before-multicore 2017-02-06T10:11:07Z <p>Move logical test for config to earlier in function and catch all<br> Local values used to shorten iterations<br> Change LL_ERR used in testing because they always print, to LL_DBG</p> <p>Change call to hm2_soc_register.<br> If we are passing the hm2_soc_t *brd, there is no point passing<br> values separately that are already contained within it</p> <p>Modify socfpga sim configs to use new param passing protocols<br> Uses argc/argv mechanism for passing strings to hm2_soc_ol</p> <p>Signed-off-by: Mick <a href="mailto:arceye@mgware.co.uk">arceye@mgware.co.uk</a></p> ArcEye tag:github.com,2008:Repository/92814271/machinekit_base 2014-02-16T19:43:02Z <p><a class="commit-link" data-hovercard-type="commit" data-hovercard-url="https://github.com/vrosnet/machinekit/commit/17b665d52cb5893492a848971b2a9cb8d070c709/hovercard" href="https://github.com/vrosnet/machinekit/commit/17b665d52cb5893492a848971b2a9cb8d070c709"><tt>17b665d</tt></a> was a failed attempt to hack around a race condition by<br> lengthening a 'sleep'; this simply made the problem appear less<br> frequently.</p> <p>The problem only occurred in the toolchanger/toolno-pocket-differ/*<br> tests. Comparing with other successful linuxcncrsh-based tests turned<br> up <a class="commit-link" data-hovercard-type="commit" data-hovercard-url="https://github.com/vrosnet/machinekit/commit/9748fe92d7b95faf5284666f25a779ea72aa810c/hovercard" href="https://github.com/vrosnet/machinekit/commit/9748fe92d7b95faf5284666f25a779ea72aa810c"><tt>9748fe9</tt></a> and the "set wait done" command, which clears up the<br> problem, even with the original 'sleep' hack removed.</p> zultron