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Merge from 'main' to 'sycl-web' (#1)
 CONFLICT (content): Merge conflict in clang/lib/Basic/Targets/SPIR.h
2 parents 62e5985 + aaba371 commit eda76af

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‎clang/include/clang/Basic/DiagnosticSemaKinds.td

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -7489,12 +7489,6 @@ def warn_deprecated_volatile_structured_binding : Warning<
74897489
"volatile qualifier in structured binding declaration is deprecated">,
74907490
InGroup<DeprecatedVolatile>;
74917491

7492-
def warn_deprecated_altivec_src_compat : Warning<
7493-
"Current handling of vector bool and vector pixel types in this context are "
7494-
"deprecated. The default behaviour will soon change to that implied by the "
7495-
"'-altivec-compat=xl' option">,
7496-
InGroup<DiagGroup<"deprecated-altivec-src-compat">>;
7497-
74987492
def err_catch_incomplete_ptr : Error<
74997493
"cannot catch pointer to incomplete type %0">;
75007494
def err_catch_incomplete_ref : Error<

‎clang/include/clang/Basic/LangOptions.def

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -126,8 +126,6 @@ LANGOPT(WritableStrings , 1, 0, "writable string support")
126126
LANGOPT(ConstStrings , 1, 0, "const-qualified string support")
127127
ENUM_LANGOPT(LaxVectorConversions, LaxVectorConversionKind, 2,
128128
LaxVectorConversionKind::All, "lax vector conversions")
129-
ENUM_LANGOPT(AltivecSrcCompat, AltivecSrcCompatKind, 2,
130-
AltivecSrcCompatKind::Default, "Altivec source compatibility")
131129
LANGOPT(ConvergentFunctions, 1, 1, "Assume convergent functions")
132130
LANGOPT(AltiVec , 1, 0, "AltiVec-style vector initializers")
133131
LANGOPT(ZVector , 1, 0, "System z vector extensions")

‎clang/include/clang/Basic/LangOptions.h

Lines changed: 0 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -249,18 +249,6 @@ class LangOptions : public LangOptionsBase {
249249
All,
250250
};
251251

252-
enum class AltivecSrcCompatKind {
253-
// All vector compares produce scalars except vector pixel and vector bool.
254-
// The types vector pixel and vector bool return vector results.
255-
Mixed,
256-
// All vector compares produce vector results as in GCC.
257-
GCC,
258-
// All vector compares produce scalars as in XL.
259-
XL,
260-
// Default clang behaviour.
261-
Default = Mixed,
262-
};
263-
264252
enum class SignReturnAddressScopeKind {
265253
/// No signing for any function.
266254
None,

‎clang/include/clang/Basic/TargetInfo.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1162,7 +1162,7 @@ class TargetInfo : public virtual TransferrableTargetInfo,
11621162
/// Apply changes to the target information with respect to certain
11631163
/// language options which change the target configuration and adjust
11641164
/// the language based on the target options where applicable.
1165-
virtual void adjust(LangOptions &Opts);
1165+
virtual void adjust(DiagnosticsEngine &Diags, LangOptions &Opts);
11661166

11671167
/// Adjust target options based on codegen options.
11681168
virtual void adjustTargetOptions(const CodeGenOptions &CGOpts,

‎clang/include/clang/Driver/Options.td

Lines changed: 2 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -3294,8 +3294,8 @@ defm aapcs_bitfield_width : BoolOption<"f", "aapcs-bitfield-width",
32943294
" volatile bit-field width is dictated by the field container type. (ARM only).">>,
32953295
Group<m_arm_Features_Group>;
32963296

3297-
def mgeneral_regs_only : Flag<["-"], "mgeneral-regs-only">, Group<m_aarch64_Features_Group>,
3298-
HelpText<"Generate code which only uses the general purpose registers (AArch64 only)">;
3297+
def mgeneral_regs_only : Flag<["-"], "mgeneral-regs-only">, Group<m_Group>,
3298+
HelpText<"Generate code which only uses the general purpose registers (AArch64/x86 only)">;
32993299
def mfix_cortex_a53_835769 : Flag<["-"], "mfix-cortex-a53-835769">,
33003300
Group<m_aarch64_Features_Group>,
33013301
HelpText<"Workaround Cortex-A53 erratum 835769 (AArch64 only)">;
@@ -3912,18 +3912,6 @@ def u : JoinedOrSeparate<["-"], "u">, Group<u_Group>;
39123912
def v : Flag<["-"], "v">, Flags<[CC1Option, CoreOption]>,
39133913
HelpText<"Show commands to run and use verbose output">,
39143914
MarshallingInfoFlag<HeaderSearchOpts<"Verbose">>;
3915-
def altivec_src_compat : Joined<["-"], "faltivec-src-compat=">,
3916-
Flags<[CC1Option]>, Group<f_Group>,
3917-
HelpText<"Source-level compatibility for Altivec vectors (for PowerPC "
3918-
"targets). This includes results of vector comparison (scalar for "
3919-
"'xl', vector for 'gcc') as well as behavior when initializing with "
3920-
"a scalar (splatting for 'xl', element zero only for 'gcc'). For "
3921-
"'mixed', the compatibility is as 'gcc' for 'vector bool/vector "
3922-
"pixel' and as 'xl' for other types. Current default is 'mixed'.">,
3923-
Values<"mixed,gcc,xl">,
3924-
NormalizedValuesScope<"LangOptions::AltivecSrcCompatKind">,
3925-
NormalizedValues<["Mixed", "GCC", "XL"]>,
3926-
MarshallingInfoEnum<LangOpts<"AltivecSrcCompat">, "Mixed">;
39273915
def verify_debug_info : Flag<["--"], "verify-debug-info">, Flags<[NoXarchOption]>,
39283916
HelpText<"Verify the binary representation of debug output">;
39293917
def weak_l : Joined<["-"], "weak-l">, Flags<[LinkerInput]>;

‎clang/include/clang/StaticAnalyzer/Core/PathSensitive/BasicValueFactory.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -52,6 +52,8 @@ class CompoundValData : public llvm::FoldingSetNode {
5252
iterator begin() const { return L.begin(); }
5353
iterator end() const { return L.end(); }
5454

55+
QualType getType() const { return T; }
56+
5557
static void Profile(llvm::FoldingSetNodeID& ID, QualType T,
5658
llvm::ImmutableList<SVal> L);
5759

‎clang/include/clang/StaticAnalyzer/Core/PathSensitive/SVals.h

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -201,6 +201,19 @@ class SVal {
201201
SymExpr::symbol_iterator symbol_end() const {
202202
return SymExpr::symbol_end();
203203
}
204+
205+
/// Try to get a reasonable type for the given value.
206+
///
207+
/// \returns The best approximation of the value type or Null.
208+
/// In theory, all symbolic values should be typed, but this function
209+
/// is still a WIP and might have a few blind spots.
210+
///
211+
/// \note This function should not be used when the user has access to the
212+
/// bound expression AST node as well, since AST always has exact types.
213+
///
214+
/// \note Loc values are interpreted as pointer rvalues for the purposes of
215+
/// this method.
216+
QualType getType(const ASTContext &) const;
204217
};
205218

206219
inline raw_ostream &operator<<(raw_ostream &os, clang::ento::SVal V) {

‎clang/lib/AST/TypePrinter.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1456,8 +1456,7 @@ void TypePrinter::printTemplateId(const TemplateSpecializationType *T,
14561456
T->getTemplateName().print(OS, Policy);
14571457
}
14581458

1459-
const TemplateParameterList *TPL = TD ? TD->getTemplateParameters() : nullptr;
1460-
printTemplateArgumentList(OS, T->template_arguments(), Policy, TPL);
1459+
printTemplateArgumentList(OS, T->template_arguments(), Policy);
14611460
spaceBeforePlaceHolder(OS);
14621461
}
14631462

‎clang/lib/Basic/TargetInfo.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -346,7 +346,7 @@ bool TargetInfo::isTypeSigned(IntType T) {
346346
/// Apply changes to the target information with respect to certain
347347
/// language options which change the target configuration and adjust
348348
/// the language based on the target options where applicable.
349-
void TargetInfo::adjust(LangOptions &Opts) {
349+
void TargetInfo::adjust(DiagnosticsEngine &Diags, LangOptions &Opts) {
350350
if (Opts.NoBitFieldTypeAlign)
351351
UseBitFieldTypeAlignment = false;
352352

‎clang/lib/Basic/Targets/AMDGPU.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -358,8 +358,8 @@ AMDGPUTargetInfo::AMDGPUTargetInfo(const llvm::Triple &Triple,
358358
MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
359359
}
360360

361-
void AMDGPUTargetInfo::adjust(LangOptions &Opts) {
362-
TargetInfo::adjust(Opts);
361+
void AMDGPUTargetInfo::adjust(DiagnosticsEngine &Diags, LangOptions &Opts) {
362+
TargetInfo::adjust(Diags, Opts);
363363
// ToDo: There are still a few places using default address space as private
364364
// address space in OpenCL, which needs to be cleaned up, then Opts.OpenCL
365365
// can be removed from the following line.

‎clang/lib/Basic/Targets/AMDGPU.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -93,7 +93,7 @@ class LLVM_LIBRARY_VISIBILITY AMDGPUTargetInfo final : public TargetInfo {
9393

9494
void setAddressSpaceMap(bool DefaultIsPrivate);
9595

96-
void adjust(LangOptions &Opts) override;
96+
void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override;
9797

9898
uint64_t getPointerWidthV(unsigned AddrSpace) const override {
9999
if (isR600(getTriple()))

‎clang/lib/Basic/Targets/NVPTX.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -179,8 +179,8 @@ class LLVM_LIBRARY_VISIBILITY NVPTXTargetInfo : public TargetInfo {
179179
return CCCR_Warning;
180180
}
181181

182-
void adjust(LangOptions &Opts) override {
183-
TargetInfo::adjust(Opts);
182+
void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) {
183+
TargetInfo::adjust(Diags, Opts);
184184
// FIXME: Needed for compiling SYCL to PTX.
185185
TLSSupported = TLSSupported || Opts.SYCLIsDevice;
186186
}

‎clang/lib/Basic/Targets/PPC.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -614,10 +614,10 @@ void PPCTargetInfo::fillValidCPUList(SmallVectorImpl<StringRef> &Values) const {
614614
Values.append(std::begin(ValidCPUNames), std::end(ValidCPUNames));
615615
}
616616

617-
void PPCTargetInfo::adjust(LangOptions &Opts) {
617+
void PPCTargetInfo::adjust(DiagnosticsEngine &Diags, LangOptions &Opts) {
618618
if (HasAltivec)
619619
Opts.AltiVec = 1;
620-
TargetInfo::adjust(Opts);
620+
TargetInfo::adjust(Diags, Opts);
621621
if (LongDoubleFormat != &llvm::APFloat::IEEEdouble())
622622
LongDoubleFormat = Opts.PPCIEEELongDouble
623623
? &llvm::APFloat::IEEEquad()

‎clang/lib/Basic/Targets/PPC.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -89,7 +89,7 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public TargetInfo {
8989
}
9090

9191
// Set the language option for altivec based on our value.
92-
void adjust(LangOptions &Opts) override;
92+
void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override;
9393

9494
// Note: GCC recognizes the following additional cpus:
9595
// 401, 403, 405, 405fp, 440fp, 464, 464fp, 476, 476fp, 505, 740, 801,

‎clang/lib/Basic/Targets/SPIR.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -136,8 +136,8 @@ class LLVM_LIBRARY_VISIBILITY SPIRTargetInfo : public TargetInfo {
136136
AddrSpaceMap = DefaultIsGeneric ? &SPIRDefIsGenMap : &SPIRDefIsPrivMap;
137137
}
138138

139-
void adjust(LangOptions &Opts) override {
140-
TargetInfo::adjust(Opts);
139+
void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override {
140+
TargetInfo::adjust(Diags, Opts);
141141
// NOTE: SYCL specification considers unannotated pointers and references
142142
// to be pointing to the generic address space. See section 5.9.3 of
143143
// SYCL 2020 specification.

‎clang/lib/Basic/Targets/WebAssembly.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -234,7 +234,8 @@ ArrayRef<Builtin::Info> WebAssemblyTargetInfo::getTargetBuiltins() const {
234234
Builtin::FirstTSBuiltin);
235235
}
236236

237-
void WebAssemblyTargetInfo::adjust(LangOptions &Opts) {
237+
void WebAssemblyTargetInfo::adjust(DiagnosticsEngine &Diags,
238+
LangOptions &Opts) {
238239
// If the Atomics feature isn't available, turn off POSIXThreads and
239240
// ThreadModel, so that we don't predefine _REENTRANT or __STDCPP_THREADS__.
240241
if (!HasAtomics) {

‎clang/lib/Basic/Targets/WebAssembly.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -138,7 +138,7 @@ class LLVM_LIBRARY_VISIBILITY WebAssemblyTargetInfo : public TargetInfo {
138138

139139
bool hasProtectedVisibility() const override { return false; }
140140

141-
void adjust(LangOptions &Opts) override;
141+
void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override;
142142
};
143143

144144
class LLVM_LIBRARY_VISIBILITY WebAssembly32TargetInfo

‎clang/lib/Basic/Targets/X86.cpp

Lines changed: 18 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -117,7 +117,20 @@ bool X86TargetInfo::initFeatureMap(
117117
for (auto &F : CPUFeatures)
118118
setFeatureEnabled(Features, F, true);
119119

120-
if (!TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec))
120+
std::vector<std::string> UpdatedFeaturesVec;
121+
for (const auto &Feature : FeaturesVec) {
122+
// Expand general-regs-only to -x86, -mmx and -sse
123+
if (Feature == "+general-regs-only") {
124+
UpdatedFeaturesVec.push_back("-x87");
125+
UpdatedFeaturesVec.push_back("-mmx");
126+
UpdatedFeaturesVec.push_back("-sse");
127+
continue;
128+
}
129+
130+
UpdatedFeaturesVec.push_back(Feature);
131+
}
132+
133+
if (!TargetInfo::initFeatureMap(Features, Diags, CPU, UpdatedFeaturesVec))
121134
return false;
122135

123136
// Can't do this earlier because we need to be able to explicitly enable
@@ -126,20 +139,20 @@ bool X86TargetInfo::initFeatureMap(
126139
// Enable popcnt if sse4.2 is enabled and popcnt is not explicitly disabled.
127140
auto I = Features.find("sse4.2");
128141
if (I != Features.end() && I->getValue() &&
129-
llvm::find(FeaturesVec, "-popcnt") == FeaturesVec.end())
142+
llvm::find(UpdatedFeaturesVec, "-popcnt") == UpdatedFeaturesVec.end())
130143
Features["popcnt"] = true;
131144

132145
// Additionally, if SSE is enabled and mmx is not explicitly disabled,
133146
// then enable MMX.
134147
I = Features.find("sse");
135148
if (I != Features.end() && I->getValue() &&
136-
llvm::find(FeaturesVec, "-mmx") == FeaturesVec.end())
149+
llvm::find(UpdatedFeaturesVec, "-mmx") == UpdatedFeaturesVec.end())
137150
Features["mmx"] = true;
138151

139152
// Enable xsave if avx is enabled and xsave is not explicitly disabled.
140153
I = Features.find("avx");
141154
if (I != Features.end() && I->getValue() &&
142-
llvm::find(FeaturesVec, "-xsave") == FeaturesVec.end())
155+
llvm::find(UpdatedFeaturesVec, "-xsave") == UpdatedFeaturesVec.end())
143156
Features["xsave"] = true;
144157

145158
return true;
@@ -866,6 +879,7 @@ bool X86TargetInfo::isValidFeatureName(StringRef Name) const {
866879
.Case("fma4", true)
867880
.Case("fsgsbase", true)
868881
.Case("fxsr", true)
882+
.Case("general-regs-only", true)
869883
.Case("gfni", true)
870884
.Case("hreset", true)
871885
.Case("invpcid", true)

‎clang/lib/CodeGen/CGBuiltin.cpp

Lines changed: 64 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -14742,46 +14742,88 @@ Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID,
1474214742
case X86::BI__builtin_ia32_aesenc256kl_u8:
1474314743
case X86::BI__builtin_ia32_aesdec256kl_u8: {
1474414744
Intrinsic::ID IID;
14745+
StringRef StrNoErr, StrErr, StrEnd;
1474514746
switch (BuiltinID) {
1474614747
default: llvm_unreachable("Unexpected builtin");
1474714748
case X86::BI__builtin_ia32_aesenc128kl_u8:
1474814749
IID = Intrinsic::x86_aesenc128kl;
14750+
StrNoErr = "aesenc128kl_no_error";
14751+
StrErr = "aesenc128kl_error";
14752+
StrEnd = "aesenc128kl_end";
1474914753
break;
1475014754
case X86::BI__builtin_ia32_aesdec128kl_u8:
1475114755
IID = Intrinsic::x86_aesdec128kl;
14756+
StrNoErr = "aesdec128kl_no_error";
14757+
StrErr = "aesdec128kl_error";
14758+
StrEnd = "aesdec128kl_end";
1475214759
break;
1475314760
case X86::BI__builtin_ia32_aesenc256kl_u8:
1475414761
IID = Intrinsic::x86_aesenc256kl;
14762+
StrNoErr = "aesenc256kl_no_error";
14763+
StrErr = "aesenc256kl_error";
14764+
StrEnd = "aesenc256kl_end";
1475514765
break;
1475614766
case X86::BI__builtin_ia32_aesdec256kl_u8:
1475714767
IID = Intrinsic::x86_aesdec256kl;
14768+
StrNoErr = "aesdec256kl_no_error";
14769+
StrErr = "aesdec256kl_error";
14770+
StrEnd = "aesdec256kl_end";
1475814771
break;
1475914772
}
1476014773

1476114774
Value *Call = Builder.CreateCall(CGM.getIntrinsic(IID), {Ops[1], Ops[2]});
1476214775

14763-
Builder.CreateDefaultAlignedStore(Builder.CreateExtractValue(Call, 1),
14764-
Ops[0]);
14776+
BasicBlock *NoError = createBasicBlock(StrNoErr, this->CurFn);
14777+
BasicBlock *Error = createBasicBlock(StrErr, this->CurFn);
14778+
BasicBlock *End = createBasicBlock(StrEnd, this->CurFn);
14779+
14780+
Value *Ret = Builder.CreateExtractValue(Call, 0);
14781+
Value *Succ = Builder.CreateTrunc(Ret, Builder.getInt1Ty());
14782+
Value *Out = Builder.CreateExtractValue(Call, 1);
14783+
Builder.CreateCondBr(Succ, NoError, Error);
14784+
14785+
Builder.SetInsertPoint(NoError);
14786+
Builder.CreateDefaultAlignedStore(Out, Ops[0]);
14787+
Builder.CreateBr(End);
1476514788

14789+
Builder.SetInsertPoint(Error);
14790+
Constant *Zero = llvm::Constant::getNullValue(Out->getType());
14791+
Builder.CreateDefaultAlignedStore(Zero, Ops[0]);
14792+
Builder.CreateBr(End);
14793+
14794+
Builder.SetInsertPoint(End);
1476614795
return Builder.CreateExtractValue(Call, 0);
1476714796
}
1476814797
case X86::BI__builtin_ia32_aesencwide128kl_u8:
1476914798
case X86::BI__builtin_ia32_aesdecwide128kl_u8:
1477014799
case X86::BI__builtin_ia32_aesencwide256kl_u8:
1477114800
case X86::BI__builtin_ia32_aesdecwide256kl_u8: {
1477214801
Intrinsic::ID IID;
14802+
StringRef StrNoErr, StrErr, StrEnd;
1477314803
switch (BuiltinID) {
1477414804
case X86::BI__builtin_ia32_aesencwide128kl_u8:
1477514805
IID = Intrinsic::x86_aesencwide128kl;
14806+
StrNoErr = "aesencwide128kl_no_error";
14807+
StrErr = "aesencwide128kl_error";
14808+
StrEnd = "aesencwide128kl_end";
1477614809
break;
1477714810
case X86::BI__builtin_ia32_aesdecwide128kl_u8:
1477814811
IID = Intrinsic::x86_aesdecwide128kl;
14812+
StrNoErr = "aesdecwide128kl_no_error";
14813+
StrErr = "aesdecwide128kl_error";
14814+
StrEnd = "aesdecwide128kl_end";
1477914815
break;
1478014816
case X86::BI__builtin_ia32_aesencwide256kl_u8:
1478114817
IID = Intrinsic::x86_aesencwide256kl;
14818+
StrNoErr = "aesencwide256kl_no_error";
14819+
StrErr = "aesencwide256kl_error";
14820+
StrEnd = "aesencwide256kl_end";
1478214821
break;
1478314822
case X86::BI__builtin_ia32_aesdecwide256kl_u8:
1478414823
IID = Intrinsic::x86_aesdecwide256kl;
14824+
StrNoErr = "aesdecwide256kl_no_error";
14825+
StrErr = "aesdecwide256kl_error";
14826+
StrEnd = "aesdecwide256kl_end";
1478514827
break;
1478614828
}
1478714829

@@ -14795,12 +14837,32 @@ Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID,
1479514837

1479614838
Value *Call = Builder.CreateCall(CGM.getIntrinsic(IID), InOps);
1479714839

14840+
BasicBlock *NoError = createBasicBlock(StrNoErr, this->CurFn);
14841+
BasicBlock *Error = createBasicBlock(StrErr, this->CurFn);
14842+
BasicBlock *End = createBasicBlock(StrEnd, this->CurFn);
14843+
14844+
Value *Ret = Builder.CreateExtractValue(Call, 0);
14845+
Value *Succ = Builder.CreateTrunc(Ret, Builder.getInt1Ty());
14846+
Builder.CreateCondBr(Succ, NoError, Error);
14847+
14848+
Builder.SetInsertPoint(NoError);
1479814849
for (int i = 0; i != 8; ++i) {
1479914850
Value *Extract = Builder.CreateExtractValue(Call, i + 1);
1480014851
Value *Ptr = Builder.CreateConstGEP1_32(Ops[0], i);
1480114852
Builder.CreateAlignedStore(Extract, Ptr, Align(16));
1480214853
}
14854+
Builder.CreateBr(End);
14855+
14856+
Builder.SetInsertPoint(Error);
14857+
for (int i = 0; i != 8; ++i) {
14858+
Value *Out = Builder.CreateExtractValue(Call, i + 1);
14859+
Constant *Zero = llvm::Constant::getNullValue(Out->getType());
14860+
Value *Ptr = Builder.CreateConstGEP1_32(Ops[0], i);
14861+
Builder.CreateAlignedStore(Zero, Ptr, Align(16));
14862+
}
14863+
Builder.CreateBr(End);
1480314864

14865+
Builder.SetInsertPoint(End);
1480414866
return Builder.CreateExtractValue(Call, 0);
1480514867
}
1480614868
}

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